Author: Sambhulal Agarwala

Publisher:

Published: 1994

Total Pages:

ISBN-13:

A new highly selective reactive ion etching process based on HBr plasma for the removal of InGaAs over InAlAs has been developed and the results are presented. The etch selectivity at a self-bias voltage of $-$100 V is over 160, which is the highest that has been reported for this material system so far. High etch selectivity is maintained over a wide range of chamber pressure and plasma self-bias voltages. The mechanism of this etch selectivity is determined to be due to the formation of involatile Al$sb2$O$sb3$. Selective HBr etching has been applied as the gate-recess process in the fabrication of InAlAs/InGaAs heterostructure FETs. Since less RIE-induced damage was observed in delta-doped structures, delta-doping was employed in all InP-based HFETs. The dc and rf device parameters of a typical 0.75-$mu$m gate-length transistor compare favorably with those of a corresponding device gate-recessed with a selective wet-etching technique. An extrinsic current-gain cutoff frequency of 150 GHz is obtained for a typical 0.2 $mu$m gate-length HFET device that was fabricated using selective HBr gate recess process. RIE-induced damage is characterized extensively using a variety of techniques such as AES, XPS, and SIMS analyses, Raman scattering, Hall measurements and Schottky characteristics. No significant degradation in surface properties is observed. The lattice damage in layer structures with 2DEG depth of greater than 20 nm was minimal. It is also observed that with increasing self-bias voltage the rate of removal of InGaAs increases faster than the rate of introduction of damage. An exponential distribution of damage with 1/e penetration depth of about 7.8 nm has been obtained. The exponential distribution of defects suggests that either ion channeling or diffusion is the possible mechanism of defect production in regions deeper than the projected range.