Masters Theses in the Pure and Applied Sciences

Masters Theses in the Pure and Applied Sciences

Author: Wade H. Shafer

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 407

ISBN-13: 1468451979

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Masters Theses in the Pure and Applied Sciences was first conceived, published, and disseminated by the Center for Information and Numerical Data Analysis and Synthesis (CINDAS) * at Purdue University in 1 957, starting its coverage of theses with the academic year 1955. Beginning with Volume 13, the printing and dissemination phases of the activity were transferred to University Microfilms/Xerox of Ann Arbor, Michigan, with the thought that such an arrangement would be more beneficial to the academic and general scientific and technical community. After five years of this joint undertaking we had concluded that it was in the interest of all con cerned if the printing and distribution of the volumes were handled by an interna tional publishing house to assure improved service and broader dissemination. Hence, starting with Volume 18, Masters Theses in the Pure and Applied Sciences has been disseminated on a worldwide basis by Plenum Publishing Cor poration of New York, and in the same year the coverage was broadened to include Canadian universities. All back issues can also be ordered from Plenum. We have reported in Volume 29 (thesis year 1984) a total of 12,637 theses titles from 23 Canadian and 202 United States universities. We are sure that this broader base for these titles reported will greatly enhance the value of this important annual reference work. While Volume 29 reports theses submitted in 1984, on occasion, certain univer sities do report theses submitted in previous years but not reported at the time.


Special Computer Architectures for Pattern Processing

Special Computer Architectures for Pattern Processing

Author: King-Sun Fu

Publisher: CRC Press

Published: 2018-05-04

Total Pages: 291

ISBN-13: 1351093681

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It has been recognized for a long time that a conventional sequential processor is inefficient for operations on pictorial data where relatively simple operations need to be performed on a large number of data elements (pixels). Though many parallel processing architectures for picture processing have been proposed in the past, very few have actually been implemented due to the costs involved. With LSI technology, it is becoming possible to realize parallel architectures at a modest cost. In the following the authors review some of the proposed architectures for pattern recognition and image processing.


Distributed Computer Control Systems 1985

Distributed Computer Control Systems 1985

Author: G. J. Suski

Publisher: Elsevier

Published: 2014-05-23

Total Pages: 239

ISBN-13: 1483298590

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Focuses on recent advances in the theory, applications and techniques for distributed computer control systems. Topics covered include: DCCS applications and case studies, DCCS communications, architectural considerations in DCCS, DCCS tools for design and development, DCCS communication management, function and resource allocation in DCCS, design methodologies for DCCS, DCCS applications and systems. Contains 22 papers.


Energy Efficient Microprocessor Design

Energy Efficient Microprocessor Design

Author: Thomas D. Burd

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 365

ISBN-13: 1461508754

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This volume starts with a description of the metrics and benchmarks used to design energy-efficient microprocessor systems, followed by energy-efficient methodologies for the architecture and circuit design, DC-DC conversion, energy-efficient software and system integration.


Power-Aware Computer Systems

Power-Aware Computer Systems

Author: Babak Falsafi

Publisher: Springer

Published: 2004-12-07

Total Pages: 224

ISBN-13: 3540286411

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Welcome to the proceedings of the 3rd Power-Aware Computer Systems (PACS 2003) Workshop held in conjunction with the 36th Annual International Symposium on Microarchitecture (MICRO-36). The increase in power and - ergy dissipation in computer systems has begun to limit performance and has also resulted in higher cost and lower reliability. The increase also implies - ducedbatterylifeinportablesystems.Becauseofthemagnitudeoftheproblem, alllevelsofcomputersystems,includingcircuits,architectures,andsoftware,are being employed to address power and energy issues. PACS 2003 was the third workshop in its series to explore power- and energy-awareness at all levels of computer systems and brought together experts from academia and industry. These proceedings include 14 research papers, selected from 43 submissions, spanningawidespectrumofareasinpower-awaresystems.Wehavegrouped the papers into the following categories: (1) compilers, (2) embedded systems, (3) microarchitectures, and (4) cache and memory systems. The ?rst paper on compiler techniques proposes pointer reuse analysis that is biased by runtime information (i.e., the targets of pointers are determined based on the likelihood of their occurrence at runtime) to map accesses to ener- e?cient memory access paths (e.g., avoid tag match). Another paper proposes compiling multiple programs together so that disk accesses across the programs can be synchronized to achieve longer sleep times in disks than if the programs are optimized separately.


MIMI 77

MIMI 77

Author: Institute of Electrical and Electronics Engineers. Canadian Region

Publisher: Long Beach, Calif. : IEEE Computer Society

Published: 1978

Total Pages: 336

ISBN-13:

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