Memory Management in Symunix II: A Design for Large-Scale Shared Memory Multiprocessors

Memory Management in Symunix II: A Design for Large-Scale Shared Memory Multiprocessors

Author: Jan Edler

Publisher: Palala Press

Published: 2018-03-03

Total Pages: 24

ISBN-13: 9781379104308

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This work has been selected by scholars as being culturally important, and is part of the knowledge base of civilization as we know it. This work was reproduced from the original artifact, and remains as true to the original work as possible. Therefore, you will see the original copyright references, library stamps (as most of these works have been housed in our most important libraries around the world), and other notations in the work. This work is in the public domain in the United States of America, and possibly other nations. Within the United States, you may freely copy and distribute this work, as no entity (individual or corporate) has a copyright on the body of the work. As a reproduction of a historical artifact, this work may contain missing or blurred pages, poor pictures, errant marks, etc. Scholars believe, and we concur, that this work is important enough to be preserved, reproduced, and made generally available to the public. We appreciate your support of the preservation process, and thank you for being an important part of keeping this knowledge alive and relevant.


Memory Management in Symunix II

Memory Management in Symunix II

Author: Jan Edler

Publisher: Forgotten Books

Published: 2016-10-01

Total Pages: 28

ISBN-13: 9781333809560

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Excerpt from Memory Management in Symunix II: A Design for Large-Scale Shared Memory Multiprocessors While various vendors and independent research groups have adapted unix and other operating systems for multiprocessor architectures, relatively little work has been done in anticipation of the software requirements of very large-scale shared memory machines containing thousands of processors. About the Publisher Forgotten Books publishes hundreds of thousands of rare and classic books. Find more at www.forgottenbooks.com This book is a reproduction of an important historical work. Forgotten Books uses state-of-the-art technology to digitally reconstruct the work, preserving the original format whilst repairing imperfections present in the aged copy. In rare cases, an imperfection in the original, such as a blemish or missing page, may be replicated in our edition. We do, however, repair the vast majority of imperfections successfully; any imperfections that remain are intentionally left to preserve the state of such historical works.


Evolution of an Operating System for Large-scale Shared-memory Multiprocessors

Evolution of an Operating System for Large-scale Shared-memory Multiprocessors

Author: Michael Lee Scott

Publisher:

Published: 1989

Total Pages: 23

ISBN-13:

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The Psyche project is characterized by (1) a design that permits the implementation of multiple models of parallelism, both within and among applications, (2) the ability to trade protection for performance, with information sharing as the default, rather than the exception, (3) explicit, user-level control of process structure and scheduling, and (4) a kernel implementation that uses shared memory itself, and that provides users with the illusion of uniform memory access times.


Memory Management for Large-scale NUMA Multiprocessors

Memory Management for Large-scale NUMA Multiprocessors

Author: T. J. LeBlanc

Publisher:

Published: 1989

Total Pages: 20

ISBN-13:

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Abstract: "Large-scale shared-memory multiprocessors such as the BBN Butterfly and IBM RP3 introduce a new level in the memory hierarchy: multiple physical memories with different memory access times. An operating system for these NUMA (NonUniform Memory Access) multiprocessors should provide traditional virtual memory management, facilitate dynamic and widespread memory sharing, and minimize the apparent disparity between local and nonlocal memory. In addition, the implementation must be scalable to configurations with hundreds or thousands of processors. This paper describes memory management in the Psyche multiprocessor operating system, under development at the University of Rochester


Reducing Memory Access Delays in Large-scale Shared-memory Multiprocessors

Reducing Memory Access Delays in Large-scale Shared-memory Multiprocessors

Author: University of Illinois at Urbana-Champaign. Center for Supercomputing Research and Development

Publisher:

Published: 1992

Total Pages: 266

ISBN-13:

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Memory access time is a key factor limiting the performance of large-scale, shared-memory multiprocessors. In such systems, limited bandwidth in the interconnection between the processors and the memories, coupled with long delays resulting from network and memory conflicts, can produce serious memory access delays. Incorporating memory hierarchies and asynchronous block transfer mechanisms are common methods for reducing these delays. However, for these two mechanisms to be wed advantageously, they must be managed effectively, either in hardware or in software. Although this memory management problem is becoming increasingly important, good techniques are still lacking. The problem of reducing memory access delays can be attacked at several levels. The first is to attempt to improve the performance of the shared-memory system itself, where the shared-memory system includes implicitly both the network and the memory modules themselves. The second is to develop techniques to manage the memory hierarchy more effectively and to make use of the block transfer mechanisms. This thesis addresses this problem at both of these levels. The first part examines the behavior of a realistic shared-memory system and evaluates cost-effective hardware modifications for improving this balance. An additional goal is to achieve memory system scalability, where the term scalable describes systems whose per-processor performance is roughly constant across the range of system sizes examined. The remainder of this thesis addresses the problem of improving utilization of local storage in shared-memory systems where, at the very least, each processor has access to local (private) storage in addition to the global (shared) memory. A combined flow-and-dependence analysis algorithm is developed which produces the analytical information needed to optimize data accesses. It is shown how this information can be used as part of an intergrated hardware/software approach to eliminating redundant (unnecessary) memory accesses and prefetching data.