On-Chip Inductance in High Speed Integrated Circuits

On-Chip Inductance in High Speed Integrated Circuits

Author: Yehea I. Ismail

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 310

ISBN-13: 1461516854

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The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuits is full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. emOn-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.


Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs

Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs

Author: Balsha R. Stanisic

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 221

ISBN-13: 1461313996

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In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.


Circuits and Systems Tutorials

Circuits and Systems Tutorials

Author: Chris Toumazou

Publisher: John Wiley & Sons

Published: 1995-12-11

Total Pages: 724

ISBN-13: 9780780311701

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Available for the first time in paperback, this ground-breaking industry textbook is heralded as a first in its state-of-the-art coverage of the most important areas emerging in circuits and systems. It is compiled from course material used in a suite of one-day tutorials on circuits and systems designed expressly for engineers and research scientists who want to explore subjects outside, but related to, their immediate fields. Authored by 50 circuits and systems experts, this volume fosters a fundamental and authoritative understanding of each subject.


Continuous-Time Low-Pass Filters for Integrated Wideband Radio Receivers

Continuous-Time Low-Pass Filters for Integrated Wideband Radio Receivers

Author: Ville Saari

Publisher: Springer Science & Business Media

Published: 2012-03-15

Total Pages: 207

ISBN-13: 1461433665

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This book presents a new filter design approach and concentrates on the circuit techniques that can be utilized when designing continuous-time low-pass filters in modern ultra-deep-submicron CMOS technologies for integrated wideband radio receivers. Coverage includes system-level issues related to the design and implementation of a complete single-chip radio receiver and related to the design and implementation of a filter circuit as a part of a complete single-chip radio receiver. Presents a new filter design approach, emphasizing low-voltage circuit solutions that can be implemented in modern, ultra-deep-submicron CMOS technologies;Includes filter circuit implementations designed as a part of a single-chip radio receiver in modern 1.2V 0.13um and 65nm CMOS;Describes design and implementation of a continuous-time low-pass filter for a multicarrier WCDMA base-station;Emphasizes system-level considerations throughout.


Circuits at the Nanoscale

Circuits at the Nanoscale

Author: Krzysztof Iniewski

Publisher: CRC Press

Published: 2018-10-08

Total Pages: 669

ISBN-13: 1351834657

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Circuits for Emerging Technologies Beyond CMOS New exciting opportunities are abounding in the field of body area networks, wireless communications, data networking, and optical imaging. In response to these developments, top-notch international experts in industry and academia present Circuits at the Nanoscale: Communications, Imaging, and Sensing. This volume, unique in both its scope and its focus, addresses the state-of-the-art in integrated circuit design in the context of emerging systems. A must for anyone serious about circuit design for future technologies, this book discusses emerging materials that can take system performance beyond standard CMOS. These include Silicon on Insulator (SOI), Silicon Germanium (SiGe), and Indium Phosphide (InP). Three-dimensional CMOS integration and co-integration with Microelectromechanical (MEMS) technology and radiation sensors are described as well. Topics in the book are divided into comprehensive sections on emerging design techniques, mixed-signal CMOS circuits, circuits for communications, and circuits for imaging and sensing. Dr. Krzysztof Iniewski is a director at CMOS Emerging Technologies, Inc., a consulting company in Vancouver, British Columbia. His current research interests are in VLSI ciruits for medical applications. He has published over 100 research papers in international journals and conferences, and he holds 18 international patents granted in the United States, Canada, France, Germany, and Japan. In this volume, he has assembled the contributions of over 60 world-reknown experts who are at the top of their field in the world of circuit design, advancing the bank of knowledge for all who work in this exciting and burgeoning area.


Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Author: Nuno Lourenço

Publisher: Springer

Published: 2016-07-29

Total Pages: 199

ISBN-13: 3319420372

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This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.


BiCMOS Technology and Applications

BiCMOS Technology and Applications

Author: Antonio R. Alvarez

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 412

ISBN-13: 1461532183

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BiCMOS Technology and Applications, Second Edition provides a synthesis of available knowledge about the combination of bipolar and MOS transistors in a common integrated circuit - BiCMOS. In this new edition all chapters have been updated and completely new chapters on emerging topics have been added. In addition, BiCMOS Technology and Applications, Second Edition provides the reader with a knowledge of either CMOS or Bipolar technology/design a reference with which they can make educated decisions regarding the viability of BiCMOS in their own application. BiCMOS Technology and Applications, Second Edition is vital reading for practicing integrated circuit engineers as well as technical managers trying to evaluate business issues related to BiCMOS. As a textbook, this book is also appropriate at the graduate level for a special topics course in BiCMOS. A general knowledge in device physics, processing and circuit design is assumed. Given the division of the book, it lends itself well to a two-part course; one on technology and one on design. This will provide advanced students with a good understanding of tradeoffs between bipolar and MOS devices and circuits.


Design of Analog Circuits Through Symbolic Analysis

Design of Analog Circuits Through Symbolic Analysis

Author: Mourad Fakhfakh

Publisher: Bentham Science Publishers

Published: 2012-08-13

Total Pages: 491

ISBN-13: 1608050955

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"Symbolic analyzers have the potential to offer knowledge to sophomores as well as practitioners of analog circuit design. Actually, they are an essential complement to numerical simulators, since they provide insight into circuit behavior which numerical "