Relaxation Techniques for the Simulation of VLSI Circuits

Relaxation Techniques for the Simulation of VLSI Circuits

Author: Jacob K. White

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 202

ISBN-13: 1461322715

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Circuit simulation has been a topic of great interest to the integrated circuit design community for many years. It is a difficult, and interesting, problem be cause circuit simulators are very heavily used, consuming thousands of computer hours every year, and therefore the algorithms must be very efficient. In addi tion, circuit simulators are heavily relied upon, with millions of dollars being gambled on their accuracy, and therefore the algorithms must be very robust. At the University of California, Berkeley, a great deal of research has been devoted to the study of both the numerical properties and the efficient imple mentation of circuit simulation algorithms. Research efforts have led to several programs, starting with CANCER in the 1960's and the enormously successful SPICE program in the early 1970's, to MOTIS-C, SPLICE, and RELAX in the late 1970's, and finally to SPLICE2 and RELAX2 in the 1980's. Our primary goal in writing this book was to present some of the results of our current research on the application of relaxation algorithms to circuit simu lation. As we began, we realized that a large body of mathematical and exper imental results had been amassed over the past twenty years by graduate students, professors, and industry researchers working on circuit simulation. It became a secondary goal to try to find an organization of this mass of material that was mathematically rigorous, had practical relevance, and still retained the natural intuitive simplicity of the circuit simulation subject.


Relaxation Techniques for the Simulation of VLSI Circuits

Relaxation Techniques for the Simulation of VLSI Circuits

Author: Jacob K. White

Publisher: Springer

Published: 2011-10-12

Total Pages: 202

ISBN-13: 9781461322726

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Circuit simulation has been a topic of great interest to the integrated circuit design community for many years. It is a difficult, and interesting, problem be cause circuit simulators are very heavily used, consuming thousands of computer hours every year, and therefore the algorithms must be very efficient. In addi tion, circuit simulators are heavily relied upon, with millions of dollars being gambled on their accuracy, and therefore the algorithms must be very robust. At the University of California, Berkeley, a great deal of research has been devoted to the study of both the numerical properties and the efficient imple mentation of circuit simulation algorithms. Research efforts have led to several programs, starting with CANCER in the 1960's and the enormously successful SPICE program in the early 1970's, to MOTIS-C, SPLICE, and RELAX in the late 1970's, and finally to SPLICE2 and RELAX2 in the 1980's. Our primary goal in writing this book was to present some of the results of our current research on the application of relaxation algorithms to circuit simu lation. As we began, we realized that a large body of mathematical and exper imental results had been amassed over the past twenty years by graduate students, professors, and industry researchers working on circuit simulation. It became a secondary goal to try to find an organization of this mass of material that was mathematically rigorous, had practical relevance, and still retained the natural intuitive simplicity of the circuit simulation subject.


Wafer-Level Integrated Systems

Wafer-Level Integrated Systems

Author: Stuart K. Tewksbury

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 456

ISBN-13: 1461316251

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From the perspective of complex systems, conventional Ie's can be regarded as "discrete" devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term "wafer level" is perhaps more appropriate than "wafer-scale". A "wafer-level" monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, "wafer-scale" merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.


The MIPS-X RISC Microprocessor

The MIPS-X RISC Microprocessor

Author: Paul Chow

Publisher: Springer Science & Business Media

Published: 2013-03-09

Total Pages: 249

ISBN-13: 1475767625

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The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de signs and to boost the performance level by over a factor of five.


BiCMOS Technology and Applications

BiCMOS Technology and Applications

Author: Antonio R. Alvarez

Publisher: Springer Science & Business Media

Published: 2013-03-09

Total Pages: 345

ISBN-13: 1475720297

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The topic of bipolar compatible CMOS (BiCMOS) is a fascinating one and of ever-growing practical importance. The "technology pendulum" has swung from the two extremes of preeminence of bipolar in the 1950s and 60s to the apparent endless horizons for VLSI NMOS technology during the 1970s and 80s. Yet starting in the 1980s severallimits were clouding the horizon for pure NMOS technology. CMOS reemerged as a· viable high density, high performance technology. Similarly by the mid 1980s scaled bipolar devices had not only demonstrated new high speed records, but early versions of mixed bipolar/CMOS technology were being produced. Hence the paradigm of either high density . Q[ high speed was metamorphasizing into an opportunity for both speed and density via a BiCMOS approach. Now as we approach the 1990s there have been a number of practical demonstrations of BiCMOS both for memory and logic applications and I expect the trend to escalate over the next decade. This book makes a timely contribution to the field of BiCMOS technology and circuit development. The evolution is now indeed rapid so that it is difficult to make such a book exhaustive of current developments. Probably equally difficult is the fact that the new technology opens a range of novel circuit opportunities that are as yet only formative in their development. Given these obstacles it is a herculean task to try to assemble a book on BiCMOS.


Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench

Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench

Author: Donald E. Thomas

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 313

ISBN-13: 1461315190

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Recently there has been increased interest in the development of computer-aided design programs to support the system level designer of integrated circuits more actively. Such design tools hold the promise of raising the level of abstraction at which an integrated circuit is designed, thus releasing the current designers from many of the details of logic and circuit level design. The promise further suggests that a whole new group of designers in neighboring engineering and science disciplines, with far less understanding of integrated circuit design, will also be able to increase their productivity and the functionality of the systems they design. This promise has been made repeatedly as each new higher level of computer-aided design tool is introduced and has repeatedly fallen short of fulfillment. This book presents the results of research aimed at introducing yet higher levels of design tools that will inch the integrated circuit design community closer to the fulfillment of that promise. 1. 1. SYNTHESIS OF INTEGRATED CmCUITS In the integrated circuit (Ie) design process, a behavior that meets certain specifications is conceived for a system, the behavior is used to produce a design in terms of a set of structural logic elements, and these logic elements are mapped onto physical units. The design process is impacted by a set of constraints as well as technological information (i. e. the logic elements and physical units used for the design).


Silicon And Beyond: Advanced Device Models And Circuit Simulators

Silicon And Beyond: Advanced Device Models And Circuit Simulators

Author: Tor A Fjeldly

Publisher: World Scientific

Published: 2000-04-20

Total Pages: 188

ISBN-13: 9814493260

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The steady downscaling of device-feature size combined with a rapid increase in circuit complexity as well as the introduction of new device concepts based on non-silicon-material systems poses great challenges for device and circuit designers. One of the major tasks is the development of new and improved device models needed for accurate device and circuit design. Another task is the development of new circuit-simulation tools to handle very large and complex circuits. This book addresses both these issues with up-to-date reviews written by leading experts in the field.The first three chapters of the book discuss advanced device models both for existing technologies and for new, emerging technologies. Among the topics covered are models for MOSFETs, thin-film transitors (TFTs), and compound semiconductor devices, including GaAs HEMTs and HFETs, heterodimensional devices, quantum-tunneling devices, as well as wide-bandgap devices. Chapters 4 and 5 discuss advanced circuit simulators that hold promise for handling circuits of much higher complexity than what is possible for typical state-of-the-art circuit simulators today.


Computer-Aided Design and VLSI Device Development

Computer-Aided Design and VLSI Device Development

Author: Kit Man Cham

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 378

ISBN-13: 1461316952

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examples are presented. These chapters are intended to introduce the reader to the programs. The program structure and models used will be described only briefly. Since these programs are in the public domain (with the exception of the parasitic simulation programs), the reader is referred to the manuals for more details. In this second edition, the process program SUPREM III has been added to Chapter 2. The device simulation program PISCES has replaced the program SIFCOD in Chapter 3. A three-dimensional parasitics simulator FCAP3 has been added to Chapter 4. It is clear that these programs or other programs with similar capabilities will be indispensible for VLSI/ULSI device developments. Part B of the book presents case studies, where the application of simu lation tools to solve VLSI device design problems is described in detail. The physics of the problems are illustrated with the aid of numerical simulations. Solutions to these problems are presented. Issues in state-of-the-art device development such as drain-induced barrier lowering, trench isolation, hot elec tron effects, device scaling and interconnect parasitics are discussed. In this second edition, two new chapters are added. Chapter 6 presents the methodol ogy and significance of benchmarking simulation programs, in this case the SUPREM III program. Chapter 13 describes a systematic approach to investi gate the sensitivity of device characteristics to process variations, as well as the trade-otIs between different device designs.


Electrothermal Analysis of VLSI Systems

Electrothermal Analysis of VLSI Systems

Author: Yi-Kan Cheng

Publisher: Springer Science & Business Media

Published: 2005-12-01

Total Pages: 220

ISBN-13: 0306470241

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This useful book addresses electrothermal problems in modern VLSI systems. It discusses electrothermal phenomena and the fundamental building blocks that electrothermal simulation requires. The authors present three important applications of VLSI electrothermal analysis: temperature-dependent electromigration diagnosis, cell-level thermal placement, and temperature-driven power and timing analysis.


Euro-Par 2011: Parallel Processing Workshops

Euro-Par 2011: Parallel Processing Workshops

Author: Michael Alexander

Publisher: Springer

Published: 2012-04-14

Total Pages: 545

ISBN-13: 3642297374

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This book constitutes thoroughly refereed post-conference proceedings of the workshops of the 17th International Conference on Parallel Computing, Euro-Par 2011, held in Bordeaux, France, in August 2011. The papers of these 12 workshops CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS HPCF, PROPER, CCPI, and VHPC focus on promotion and advancement of all aspects of parallel and distributed computing.