This book, written for a wide readership with some background in the natural sciences, addresses the very old problem of the mind-brain-relationship. The authors, all well-known scientists, approach the subject in different stages. The first part addresses some general principles based on physics, computer science, and theoretical biology. The two following parts deal with the problem at different organizational levels, from the microscopic to the macroscopic. The fourth part addresses the subjective level founded on the findings of psychologists and neurophysiologists.
System-on-Chip for Real-Time Applications will be of interest to engineers, both in industry and academia, working in the area of SoC VLSI design and application. It will also be useful to graduate and undergraduate students in electrical and computer engineering and computer science. A selected set of papers from the 2nd International Workshop on Real-Time Applications were used to form the basis of this book. It is organized into the following chapters: -Introduction; -Design Reuse; -Modeling; -Architecture; -Design Techniques; -Memory; -Circuits; -Low Power; -Interconnect and Technology; -MEMS. System-on-Chip for Real-Time Applications contains many signal processing applications and will be of particular interest to those working in that community.
This book constitutes the proceedings of the 5th International Conference on Interactive Theorem Proving, ITP 2014, Held as Part of the Vienna Summer of Logic, VSL 2014, in Vienna, Austria, in July 2014. The 35 papers presented in this volume were carefully reviewed and selected from 59 submissions. The topics range from theoretical foundations to implementation aspects and applications in program verification, security and formalization of mathematics.
The topic areas presented within this volume focus on design environments and the applications of hardware description and modelling – including simulation, verification by correctness proofs, synthesis and test. The strong relationship between the topics of CHDL'91 and the work around the use and re-standardization of the VHDL language is also explored. The quality of this proceedings, and its significance to the academic and professional worlds is assured by the excellent technical programme here compiled.
This advanced textbook presents an almost complete overview of techniques for hardware verification. It covers all approaches used in existing tools, such as binary and word-level decision diagrams, symbolic methods for equivalence and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness. Each chapter contains an introduction and a summary as well as a section for the advanced reader, aiding an understanding of the advantages and limitations of each technique. Backed by many examples and illustrations, this text will appeal to a broad audience, from beginners in system design to experts. XXXXXXX Neuer Text This is a complete overview of existing techniques for hardware verification. It covers all approaches used in existing verification tools, such as symbolic methods for equivalence checking, temporal logic model checking, and higher-order logic theorem proving for verifying circuit correctness. The book helps readers to understand the advantages and limitations of each technique. Each chapter contains a summary as well as a section for the advanced reader.
VLSI Specification, Verification and Synthesis Proceedings of a workshop held in Calgary from 12-16 January 1987. The collection of papers in this book represents some of the discussions and presentations at a workshop on hardware verification held in Calgary, January 12-16 1987. The thrust of the workshop was to give the floor to a few leading researchers involved in the use of formal approaches to VLSI design, and provide them ample time to develop not only their latest ideas but also the evolution of these ideas. In contrast to simulation, where the objective is to assist in detecting errors in system behavior in the case of some selected inputs, the intent of hardware verification is to formally prove that a chip design meets a specification of its intended behavior (for all acceptable inputs). There are several important applications where formal verification of designs may be argued to be cost-effective. Examples include hardware components used in "safety critical" applications such as flight control, industrial plants, and medical life-support systems (such as pacemakers). The problems are of such magnitude in certain defense applications that the UK Ministry of Defense feels it cannot rely on commercial chips and has embarked on a program of producing formally verified chips to its own specification. Hospital, civil aviation, and transport boards in the UK will also use these chips. A second application domain for verification is afforded by industry where specific chips may be used in high volume or be remotely placed.
These proceedings contain the papers presented at a workshop on Designing Correct Circuits, jointly organised by the Universities of Oxford and Glasgow, and held in Oxford on 26-28 September 1990. There is a growing interest in the application to hardware design of the techniques of software engineering. As the complexity of hardware systems grows, and as the cost both in money and time of making design errors becomes more apparent, so there is an eagerness to build on the success of mathematical techniques in program develop ment. The harsher constraints on hardware designers mean both that there is a greater need for good abstractions and rigorous assurances of the trustworthyness of designs, and also that there is greater reason to expect that these benefits can be realised. The papers presented at this workshop consider the application of mathematics to hardware design at several different levels of abstraction. At the lowest level of this spectrum, Zhou and Hoare show how to describe and reason about synchronous switching circuits using UNilY, a formalism that was developed for reasoning about parallel programs. Aagaard and Leeser use standard mathematical tech niques to prove correct their implementation of an algorithm for Boolean simplification. The circuits generated by their formal synthesis system are thus correct by construction. Thuau and Pilaud show how the declarative language LUSTRE, which was designed for program ming real-time systems, can be used to specify synchronous circuits.
This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996. The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing.
Microprocessors increasingly control and monitor our most critical systems, including automobiles, airliners, medical systems, transportation grids, and defense systems. The relentless march of semiconductor process technology has given engineers exponentially increasing transistor budgets at constant recurring cost. This has encouraged increased functional integration onto a single die, as well as increased architectural sophistication of the functional units themselves. Additionally, design cycle times are decreasing, thus putting increased schedule pressure on engineers. Not surprisingly, this environment has led to a number of uncaught design flaws. Traditional simulation-based design verification has not kept up with the scale or pace of modern microprocessor system design. Formal verification methods offer the promise of improved bug-finding capability, as well as the ability to establish functional correctness of a detailed design relative to a high-level specification. However, widespread use of formal methods has had to await breakthroughs in automated reasoning, integration with engineering design languages and processes, scalability, and usability. This book presents several breakthrough design and verification techniques that allow these powerful formal methods to be employed in the real world of high-assurance microprocessor system design.
