This book describes a new design methodology that allows optimization-based synthesis of RF systems in a hierarchical multilevel approach, in which the system is designed in a bottom-up fashion, from the device level up to the (sub)system level. At each level of the design hierarchy, the authors discuss methods that increase the design robustness and increase the accuracy and efficiency of the simulations. The methodology described enables circuit sizing and layout in a complete and automated integrated manner, achieving optimized designs in significantly less time than with traditional approaches.
Integrated circuits are fundamental electronic components in biomedical, automotive and many other technical systems. A small, yet crucial part of a chip consists of analog circuitry. This part is still in large part designed by hand and therefore represents not only a bottleneck in the design flow, but also a permanent source of design errors responsible for re-designs, costly in terms of wasted test chips and in terms of lost time-to-market. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.
This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.
Improving the performance of existing technologies has always been a focal practice in the development of computational systems. However, as circuitry is becoming more complex, conventional techniques are becoming outdated and new research methodologies are being implemented by designers. Performance Optimization Techniques in Analog, Mix-Signal, and Radio-Frequency Circuit Design features recent advances in the engineering of integrated systems with prominence placed on methods for maximizing the functionality of these systems. This book emphasizes prospective trends in the field and is an essential reference source for researchers, practitioners, engineers, and technology designers interested in emerging research and techniques in the performance optimization of different circuit designs.
The number of transistors in integrated circuits doubles every two years, as stipulated by Moore’s law, and this has been the driving force for the huge development of the microelectronics industry in the past 50 years – currently advanced to the nanometric scale. This e-book is dedicated to electronic noises and parasites, accounting for issues involving substrate coupling and interconnections, in the perspective of the 3D integration: a second track for enhancing integration, also compatible with Moore’s law. This reference explains the modeling of 3D circuits without delving into the latest advances, but highlights crucial problems, for instance electro-thermo-mechanical problems, which could be addressed through 3D modeling. The book also explains electromagnetic interferences , at different modeling levels (device and circuit) oriented towards 3D integration technologies. It also covers substrate noise, such as disturbances of digital blocks, power bounces, phase noise in oscillators, both at the device level, such as carriers or field fluctuations, and circuit levels. The entanglement between interconnect and substrate is also discussed. This e-book serves as a reference for advanced graduates or researchers in the field of micro and nano electronics interested in topics relevant to electromagnetic interference or the ‘noise’ domain, at device or circuit and system levels
This book provides readers with an up-to-date account of the use of machine learning frameworks, methodologies, algorithms and techniques in the context of computer-aided design (CAD) for very-large-scale integrated circuits (VLSI). Coverage includes the various machine learning methods used in lithography, physical design, yield prediction, post-silicon performance analysis, reliability and failure analysis, power and thermal analysis, analog design, logic synthesis, verification, and neuromorphic design. Provides up-to-date information on machine learning in VLSI CAD for device modeling, layout verifications, yield prediction, post-silicon validation, and reliability; Discusses the use of machine learning techniques in the context of analog and digital synthesis; Demonstrates how to formulate VLSI CAD objectives as machine learning problems and provides a comprehensive treatment of their efficient solutions; Discusses the tradeoff between the cost of collecting data and prediction accuracy and provides a methodology for using prior data to reduce cost of data collection in the design, testing and validation of both analog and digital VLSI designs. From the Foreword As the semiconductor industry embraces the rising swell of cognitive systems and edge intelligence, this book could serve as a harbinger and example of the osmosis that will exist between our cognitive structures and methods, on the one hand, and the hardware architectures and technologies that will support them, on the other....As we transition from the computing era to the cognitive one, it behooves us to remember the success story of VLSI CAD and to earnestly seek the help of the invisible hand so that our future cognitive systems are used to design more powerful cognitive systems. This book is very much aligned with this on-going transition from computing to cognition, and it is with deep pleasure that I recommend it to all those who are actively engaged in this exciting transformation. Dr. Ruchir Puri, IBM Fellow, IBM Watson CTO & Chief Architect, IBM T. J. Watson Research Center
In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the sizing task of RF IC design, which is used in two different steps of the automatic design process. The advances in telecommunications, such as the 5th generation broadband or 5G for short, open doors to advances in areas such as health care, education, resource management, transportation, agriculture and many other areas. Consequently, there is high pressure in today’s market for significant communication rates, extensive bandwidths and ultralow-power consumption. This is where radiofrequency (RF) integrated circuits (ICs) come in hand, playing a crucial role. This demand stresses out the problem which resides in the remarkable difficulty of RF IC design in deep nanometric integration technologies due to their high complexity and stringent performances. Given the economic pressure for high quality yet cheap electronics and challenging time-to-market constraints, there is an urgent need for electronic design automation (EDA) tools to increase the RF designers’ productivity and improve the quality of resulting ICs. In the last years, the automatic sizing of RF IC blocks in deep nanometer technologies has moved toward process, voltage and temperature (PVT)-inclusive optimizations to ensure their robustness. Each sizing solution is exhaustively simulated in a set of PVT corners, thus pushing modern workstations’ capabilities to their limits. Standard ANNs applications usually exploit the model’s capability of describing a complex, harder to describe, relation between input and target data. For that purpose, ANNs are a mechanism to bypass the process of describing the complex underlying relations between data by feeding it a significant number of previously acquired input/output data pairs that the model attempts to copy. Here, and firstly, the ANNs disrupt from the most recent trials of replacing the simulator in the simulation-based sizing with a machine/deep learning model, by proposing two different ANNs, the first classifies the convergence of the circuit for nominal and PVT corners, and the second predicts the oscillating frequencies for each case. The convergence classifier (CCANN) and frequency guess predictor (FGPANN) are seamlessly integrated into the simulation-based sizing loop, accelerating the overall optimization process. Secondly, a PVT regressor that inputs the circuit’s sizing and the nominal performances to estimate the PVT corner performances via multiple parallel artificial neural networks is proposed. Two control phases prevent the optimization process from being misled by inaccurate performance estimates. As such, this book details the optimal description of the input/output data relation that should be fulfilled. The developed description is mainly reflected in two of the system’s characteristics, the shape of the input data and its incorporation in the sizing optimization loop. An optimal description of these components should be such that the model should produce output data that fulfills the desired relation for the given training data once fully trained. Additionally, the model should be capable of efficiently generalizing the acquired knowledge in newer examples, i.e., never-seen input circuit topologies.
Modern telecommunication systems are highly complex from an algorithmic point of view. The complexity continues to increase due to advanced modulation schemes, multiple protocols and standards, as well as additional functionality such as personal organizers or navigation aids. To have short and reliable design cycles, efficient verification methods and tools are necessary. Modeling and simulation need to accompany the design steps from the specification to the overall system verification in order to bridge the gaps between system specification, system simulation, and circuit level simulation. Very high carrier frequencies together with long observation periods result in extremely large computation times and requires, therefore, specialized modeling methods and simulation tools on all design levels. The focus of Modeling and Simulation for RF System Design lies on RF specific modeling and simulation methods and the consideration of system and circuit level descriptions. It contains application-oriented training material for RF designers which combines the presentation of a mixed-signal design flow, an introduction into the powerful standardized hardware description languages VHDL-AMS and Verilog-A, and the application of commercially available simulators. Modeling and Simulation for RF System Design is addressed to graduate students and industrial professionals who are engaged in communication system design and want to gain insight into the system structure by own simulation experiences. The authors are experts in design, modeling and simulation of communication systems engaged at the Nokia Research Center (Bochum, Germany) and the Fraunhofer Institute for Integrated Circuits, Branch Lab Design Automation (Dresden, Germany).
