Memory Optimizations of Embedded Applications for Energy Efficiency

Memory Optimizations of Embedded Applications for Energy Efficiency

Author: Jong Soo Park

Publisher: Stanford University

Published: 2011

Total Pages: 177

ISBN-13:

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The current embedded processors often do not satisfy increasingly demanding computation requirements of embedded applications within acceptable energy efficiency, whereas application-specific integrated circuits require excessive design costs. In the Stanford Elm project, it was identified that instruction and data delivery, not computation, dominate the energy consumption of embedded processors. Consequently, the energy efficiency of delivering instructions and data must be sufficiently improved to close the efficiency gap between application-specific integrated circuits and programmable embedded processors. This dissertation demonstrates that the compiler and run-time system can play a crucial role in improving the energy efficiency of delivering instructions and data. Regarding instruction delivery, I present a compiler algorithm that manages L0 instruction scratch-pad memories that reside between processor cores and L1 caches. Despite the lack of tags, the scratch-pad memories with our algorithm can achieve lower miss rates than caches with the same capacities, saving significant instruction delivery energy. Regarding data delivery, I present methods that minimize memory-space requirements for parallelizing stream applications, applications that are commonly found in the embedded domain. When stream applications are parallelized in pipelining, large enough buffers are required between pipeline stages to sustain the throughput (e.g., double buffering). For static stream applications where production and consumption rates of stages are close to compile-time constants, a compiler analysis is presented, which computes the minimum buffer capacity that maximizes the throughput. Based on this analysis, a new static streamscheduling algorithm is developed, which yields considerable speed-up and data delivery energy saving compared to a previous algorithm. For dynamic stream applications, I present a dynamically-sized array-based queue design that achieves speed-up and data delivery energy saving compared to a linked-list based queue design.


Energy-Aware Memory Management for Embedded Multimedia Systems

Energy-Aware Memory Management for Embedded Multimedia Systems

Author: Florin Balasa

Publisher:

Published: 2011

Total Pages: 0

ISBN-13:

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Energy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach presents recent computer-aided design (CAD) ideas that address memory management tasks, particularly the optimization of energy consumption in the memory subsystem. It explains how to efficiently implement CAD solutions, including theoretical methods and novel algorithms. The book covers various energy-aware design techniques, including data-dependence analysis techniques, memory size estimation methods, extensions of mapping approaches, and memory banking approaches. It shows how these techniques are used to evaluate the data storage of an application, reduce dynamic and static energy consumption, design energy-efficient address generation units, and much more. Providing an algebraic framework for memory management tasks, this book illustrates how to optimize energy consumption in memory subsystems using CAD solutions. The algorithmic style of the text should help electronic design automation (EDA) researchers and tool developers create prototype software tools for system-level exploration, with the goal to ultimately obtain an optimized architectural solution of the memory subsystem.


Advanced Memory Optimization Techniques for Low-Power Embedded Processors

Advanced Memory Optimization Techniques for Low-Power Embedded Processors

Author: Manish Verma

Publisher: Springer Science & Business Media

Published: 2007-06-20

Total Pages: 192

ISBN-13: 1402058977

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This book proposes novel memory hierarchies and software optimization techniques for the optimal utilization of memory hierarchies. It presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.


Memory Design Techniques for Low Energy Embedded Systems

Memory Design Techniques for Low Energy Embedded Systems

Author: Alberto Macii

Publisher: Springer Science & Business Media

Published: 2002-03-31

Total Pages: 166

ISBN-13: 9780792376903

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Memory Design Techniques for Low Energy Embedded Systems centers one of the most outstanding problems in chip design for embedded application. It guides the reader through different memory organizations and technologies and it reviews the most successful strategies for optimizing them in the power and performance plane.


Memory Allocation Problems in Embedded Systems

Memory Allocation Problems in Embedded Systems

Author: Maria Soto

Publisher: John Wiley & Sons

Published: 2013-01-24

Total Pages: 149

ISBN-13: 1118577663

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Embedded systems are everywhere in contemporary life and are supposed to make our lives more comfortable. In industry, embedded systems are used to manage and control complex systems (e.g. nuclear power plants, telecommunications and flight control) and they are also taking an important place in our daily activities (e.g. smartphones, security alarms and traffic lights). In the design of embedded systems, memory allocation and data assignment are among the main challenges that electronic designers have to face. In fact, they impact heavily on the main cost metrics (power consumption, performance and area) in electronic devices. Thus designers of embedded systems have to pay careful attention in order to minimize memory requirements, thus improving memory throughput and limiting the power consumption by the system’s memory. Electronic designers attempt to minimize memory requirements with the aim of lowering the overall system costs. A state of the art of optimization techniques for memory management and data assignment is presented in this book.


Modeling and Optimization of Parallel and Distributed Embedded Systems

Modeling and Optimization of Parallel and Distributed Embedded Systems

Author: Arslan Munir

Publisher: John Wiley & Sons

Published: 2016-02-08

Total Pages: 399

ISBN-13: 1119086418

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This book introduces the state-of-the-art in research in parallel and distributed embedded systems, which have been enabled by developments in silicon technology, micro-electro-mechanical systems (MEMS), wireless communications, computer networking, and digital electronics. These systems have diverse applications in domains including military and defense, medical, automotive, and unmanned autonomous vehicles. The emphasis of the book is on the modeling and optimization of emerging parallel and distributed embedded systems in relation to the three key design metrics of performance, power and dependability. Key features: Includes an embedded wireless sensor networks case study to help illustrate the modeling and optimization of distributed embedded systems. Provides an analysis of multi-core/many-core based embedded systems to explain the modeling and optimization of parallel embedded systems. Features an application metrics estimation model; Markov modeling for fault tolerance and analysis; and queueing theoretic modeling for performance evaluation. Discusses optimization approaches for distributed wireless sensor networks; high-performance and energy-efficient techniques at the architecture, middleware and software levels for parallel multicore-based embedded systems; and dynamic optimization methodologies. Highlights research challenges and future research directions. The book is primarily aimed at researchers in embedded systems; however, it will also serve as an invaluable reference to senior undergraduate and graduate students with an interest in embedded systems research.


Low-Power Electronics Design

Low-Power Electronics Design

Author: Christian Piguet

Publisher: CRC Press

Published: 2018-10-03

Total Pages: 912

ISBN-13: 1420039555

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The power consumption of integrated circuits is one of the most problematic considerations affecting the design of high-performance chips and portable devices. The study of power-saving design methodologies now must also include subjects such as systems on chips, embedded software, and the future of microelectronics. Low-Power Electronics Design covers all major aspects of low-power design of ICs in deep submicron technologies and addresses emerging topics related to future design. This volume explores, in individual chapters written by expert authors, the many low-power techniques born during the past decade. It also discusses the many different domains and disciplines that impact power consumption, including processors, complex circuits, software, CAD tools, and energy sources and management. The authors delve into what many specialists predict about the future by presenting techniques that are promising but are not yet reality. They investigate nanotechnologies, optical circuits, ad hoc networks, e-textiles, as well as human powered sources of energy. Low-Power Electronics Design delivers a complete picture of today's methods for reducing power, and also illustrates the advances in chip design that may be commonplace 10 or 15 years from now.


Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

Author: Jorge Juan Chico

Publisher: Springer

Published: 2003-10-02

Total Pages: 647

ISBN-13: 3540397620

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Welcome to the proceedings of PATMOS 2003. This was the 13th in a series of international workshops held in several locations in Europe. Over the years, PATMOS has gained recognition as one of the major European events devoted to power and timing aspects of integrated circuit and system design. Despite its signi?cant growth and development, PATMOS can still be considered as a very informal forum, featuring high-level scienti?c presentations together with open discussions and panel sessions in a free and relaxed environment. This year, PATMOS took place in Turin, Italy, organized by the Politecnico di Torino, with technical co-sponsorship from the IEEE Circuits and Systems Society and the generous support of the European Commission, as well as that of several industrial sponsors, including BullDAST, Cadence, Mentor Graphics, STMicroelectronics, and Synopsys. The objective of the PATMOS workshop is to provide a forum to discuss and investigate the emerging problems in methodologies and tools for the design of new generations of integrated circuits and systems. A major emphasis of the technical program is on speed and low-power aspects, with particular regard to modeling, characterization, design, and architectures.


Energy-Efficient Communication Processors

Energy-Efficient Communication Processors

Author: Robert Fasthuber

Publisher: Springer Science & Business Media

Published: 2013-05-29

Total Pages: 306

ISBN-13: 1461449928

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This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author’s design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes.


Embedded and Ubiquitous Computing - EUC 2005

Embedded and Ubiquitous Computing - EUC 2005

Author: Laurence T. Yang

Publisher: Springer

Published: 2005-11-24

Total Pages: 1226

ISBN-13: 3540322957

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Welcome to the proceedings of the 2005 IFIP International Conference on - bedded and Ubiquitous Computing (EUC 2005), which was held in Nagasaki, Japan, December 6–9, 2005. Embedded and ubiquitous computing is emerging rapidly as an exciting new paradigm to provide computing and communication services all the time, - erywhere. Its systems are now pervading every aspect of life to the point that they are hidden inside various appliances or can be worn unobtrusively as part of clothing and jewelry. This emergence is a natural outcome of research and technological advances in embedded systems, pervasive computing and c- munications, wireless networks, mobile computing, distributed computing and agent technologies, etc. Its tremendous impact on academics, industry, gove- ment, and daily life can be compared to that of electric motors over the past century, in fact it but promises to revolutionize life much more profoundly than elevators, electric motors or even personal computers. The EUC 2005 conference provided a forum for engineers and scientists in academia, industry, and government to address profound issues including te- nical challenges, safety, and social, legal, political, and economic issues, and to present and discuss their ideas, results, work in progress, and experience on all aspects of embedded and ubiquitous computing.