Design to Test
Design to Test

Author: John Turino

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 334

ISBN-13: 9401160449

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This book is the second edition of Design to Test. The first edition, written by myself and H. Frank Binnendyk and first published in 1982, has undergone several printings and become a standard in many companies, even in some countries. Both Frank and I are very proud of the success that our customers have had in utilizing the information, all of it still applicable to today's electronic designs. But six years is a long time in any technology field. I therefore felt it was time to write a new edition. This new edition, while retaining the basic testability prin ciples first documented six years ago, contains the latest material on state-of-the-art testability techniques for electronic devices, boards, and systems and has been completely rewritten and up dated. Chapter 15 from the first edition has been converted to an appendix. Chapter 6 has been expanded to cover the latest tech nology devices. Chapter 1 has been revised, and several examples throughout the book have been revised and updated. But some times the more things change, the more they stay the same. All of the guidelines and information presented in this book deal with the three basic testability principles-partitioning, control, and visibility. They have not changed in years. But many people have gotten smarter about how to implement those three basic test ability principles, and it is the aim of this text to enlighten the reader regarding those new (and old) testability implementation techniques.

Designer's Guide to Testable Asic Devices
Designer's Guide to Testable Asic Devices

Author: Wayne M. Needham

Publisher: Springer Science & Business Media

Published: 1991-01-10

Total Pages: 336

ISBN-13: 9780442002213

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While making up a larger percentage of the total number of designs produced each year, ASICs present special problems for system designers in the area of testing because each design is complex and unique. This book shows readers how to apply basic test techniques to ASIC design, details the impact of ASIC testability on total system cost and performance, and reviews the commercial test systems that are currently available. Annotation copyrighted by Book News, Inc., Portland, OR

Design of VLSI Circuits
Design of VLSI Circuits

Author: Egon Hörbst

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 328

ISBN-13: 3642955258

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Microelectronics are certainly one of the key-technologies of our time. They are a key factor of technological and economic progress. They effect the fields of automation, information and communication, leading to the development of new applications and markets. Attention should be focused on three areas of development: • process and production technology, • test technology, • design technology. Clearly, because of the development of new application fields, the skill ~f design ing integrated circuits should not be limited to a few, highly specialized experts Rather, this ability should be made available to all system aDd design engineers as a new application technology - just like nrogramrning technology for software. For this reason, design procedures havt: to be developed which, supported by appropriate CAD systems, provide the desIgn englIl~I' with tools for representaltop effective instruments for design and reliable ·tools for verificatibn, ensuring simpre, proper and easily controllable interfaces for the manufacturing and test processes. Such CAD systems are called standard design systems. They open the way to fast and safe design of integrated circuits. First, this book demonstrates basic principles with an example of the Siemens design system VENUS, gives a general introduction to the method of designing integrated circuits, familiarizes the reader with basic semiconductor and circuit tech nologies, shows the various methods of layout design, and presents necessary con cepts and strategies of test technology.

Introduction to Advanced System-on-Chip Test Design and Optimization
Introduction to Advanced System-on-Chip Test Design and Optimization

Author: Erik Larsson

Publisher: Springer Science & Business Media

Published: 2006-03-30

Total Pages: 397

ISBN-13: 0387256245

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SOC test design and its optimization is the topic of Introduction to Advanced System-on-Chip Test Design and Optimization. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process.

Computer Design Aids for VLSI Circuits
Computer Design Aids for VLSI Circuits

Author: P. Antognetti

Publisher: Springer Science & Business Media

Published: 2013-11-11

Total Pages: 543

ISBN-13: 9401180067

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The Nato Advanced Study Institute on "Computer Design Aids for VLSI Circuits" was held from July 21 to August 1, 1980 at Sogesta, Urbino, Italy. Sixty-three carefully chosen profes sionals were invited to participate in this institute together with 12 lecturers and 7 assistants. The 63 participants were selected from a group of almost 140 applicants. Each had the background to learn effectively the set of computer IC design aids which were presented. Each also had individual expertise in at least one of the topics of the Institute. The Institute was designed to provide hands-on type of experience rather than consisting of solely lecture and discussion. Each morning, detailed presentations were made concerning the critical algorithms that are used in the various types of computer IC design aids. Each afternoon a lengthy period was used to provide the participants with direct access to the computer programs. In addition to using the programs, the individual could, if his expertise was sufficient, make modifications of and extensions to the programs, or establish limitations of these present aids. The interest in this hands-on activity was very high and many participants worked with the programs every free hour. The editors would like to thank the Direction of SOGESTA for the excellent facilities, ~1r. R. Riccioni of the SOGESTA Computer Center and Mr. 11. Vanzi of the University of Genova for enabling all the programs to run smoothly on the set date. P.Antognetti D.O.Pederson Urbino, Summer 1980.

Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems
Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems

Author: Fevzi Belli

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 401

ISBN-13: 3642456286

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Dieser Band enthält die 38 Beiträge der 3. GI/ITG/GMA-Fachtagung über "Fehlertolerierende Rechensysteme". Unter den 10 aus dem Ausland eingegangenen Beiträgen sind 4 eingeladene Vorträge. Insgesamt dokumentiert dieser Tagungsband die Entwicklung der Konzeption und Implementierung fehlertoleranter Systeme in den letzten drei Jahren vor allem in Europa. Sämtliche Beiträge sind neue Forschungs- oder Entwicklungsergebnisse, die vom Programmausschuß der Tagung aus 70 eingereichten Beiträgen ausgewählt wurden.

Economics of Electronic Design, Manufacture and Test
Economics of Electronic Design, Manufacture and Test

Author: M. Abadir

Publisher: Springer Science & Business Media

Published: 2013-06-29

Total Pages: 181

ISBN-13: 147575048X

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The general understanding of design is that it should lead to a manufacturable product. Neither the design nor the process of manufacturing is perfect. As a result, the product will be faulty, will require testing and fixing. Where does economics enter this scenario? Consider the cost of testing and fixing the product. If a manufactured product is grossly faulty, or too many of the products are faulty, the cost of testing and fixing will be high. Suppose we do not like that. We then ask what is the cause of the faulty product. There must be something wrong in the manufacturing process. We trace this cause and fix it. Suppose we fix all possible causes and have no defective products. We would have eliminated the need for testing. Unfortunately, things are not so perfect. There is a cost involved with finding and eliminating the causes of faults. We thus have two costs: the cost of testing and fixing (we will call it cost-1), and the cost of finding and eliminating causes of faults (call it cost-2). Both costs, in some way, are included in the overall cost of the product. If we try to eliminate cost-1, cost-2 goes up, and vice versa. An economic system of production will minimize the overall cost of the product. Economics of Electronic Design, Manufacture and Test is a collection of research contributions derived from the Second Workshop on Economics of Design, Manufacture and Test, written for inclusion in this book.