High Performance Power Delivery for Nanoscale Integrated Circuits
High Performance Power Delivery for Nanoscale Integrated Circuits

Author: Selçuk Köse

Publisher:

Published: 2012

Total Pages: 240

ISBN-13:

DOWNLOAD EBOOK

"A critical challenge in high performance nanoscale integrated circuits is high quality power delivery. The efficient generation and distribution of multiple on-chip power supply voltages require fundamental changes to the power delivery process to provide increased current in next generation nanoscale integrated circuits. Four primary components are required to realize an efficient power delivery system: (a) ultra-small voltage converters to generate power close to the load, (b) accurate models to characterize the individual power components, (c) efficient algorithms to analyze the quality of the power delivered to the load circuits, and (d) a co-design methodology to simultaneously determine the optimal location of the on-chip power supplies and decoupling capacitors. In this dissertation, a hybrid combination of a switching and low-dropout (LDO) regulator as a point-of-load power supply for next generation heterogeneous systems is proposed. The area of this circuit is significantly smaller than the area of conventional voltage regulators, while maintaining high current efficiency. The proposed circuit provides a means for distributing multiple local power supplies across an integrated circuit. Another important challenge in the realization of effective power delivery systems is the analysis of this highly complicated structure where individual voltage fluctuations at millions of nodes need to be efficiently determined. Closed-form expressions for the effective resistance between circuit components have been developed. This effective resistance model is utilized in the development of a power grid analysis algorithm to compute the node voltages without requiring any iterations. This algorithm drastically improves computational complexity since the iterative procedures to determine IR drop and L di/dt noise are no longer needed. With the introduction of ultra-small on-chip voltage regulators, there is a need for novel design methodologies to determine the location of these on-chip power supplies and decoupling capacitors. A co-design methodology is proposed to simultaneously determine the optimal location of the power supplies and decoupling capacitors within a high performance power delivery network. Optimization algorithms widely used for facility location problems are applied in the proposed methodology. The effects of the size, number, and location of the power supplies and decoupling capacitors on the power noise are also discussed"--Page ix-x.

High Performance Integrated Circuit Design
High Performance Integrated Circuit Design

Author: Emre Salman

Publisher: McGraw Hill Professional

Published: 2012-08-21

Total Pages: 738

ISBN-13: 0071635769

DOWNLOAD EBOOK

The latest techniques for designing robust, high performance integrated circuits in nanoscale technologies Focusing on a new technological paradigm, this practical guide describes the interconnect-centric design methodologies that are now the major focus of nanoscale integrated circuits (ICs). High Performance Integrated Circuit Design begins by discussing the dominant role of on-chip interconnects and provides an overview of technology scaling. The book goes on to cover data signaling, power management, synchronization, and substrate-aware design. Specific design constraints and methodologies unique to each type of interconnect are addressed. This comprehensive volume also explains the design of specialized circuits such as tapered buffers and repeaters for data signaling, voltage regulators for power management, and phase-locked loops for synchronization. This is an invaluable resource for students, researchers, and engineers working in the area of high performance ICs. Coverage includes: Technology scaling Interconnect modeling and extraction Signal propagation and delay analysis Interconnect coupling noise Global signaling Power generation Power distribution networks CAD of power networks Techniques to reduce power supply noise Power dissipation Synchronization theory and tradeoffs Synchronous system characteristics On-chip clock generation and distribution Substrate noise in mixed-signal ICs Techniques to reduce substrate noise

Power Integrity for Nanoscale Integrated Systems
Power Integrity for Nanoscale Integrated Systems

Author: Masanori Hashimoto

Publisher: McGraw Hill Professional

Published: 2014-03-07

Total Pages: 417

ISBN-13: 0071787771

DOWNLOAD EBOOK

Proven methods for noise-tolerant nanoscale integrated circuit design This leading-edge guide discusses the impact of power integrity from a design perspective, emphasizing phenomena and problems induced by power integrity degradation and the latest design trends, including low-power design. Power Integrity for Nanoscale Integrated Systems describes how these problems can be forecast early in the design process and the countermeasures that can be used to address them, such as the inclusion of inductance and accurate modeling for PI analysis, as well as robust circuit design. Detailed examples and a case study on the IBM POWER7+ processor illustrate real-world applications of the techniques presented in this practical resource. Coverage includes: Significance of power integrity for integrated circuits Supply and substrate noise impact on circuits Clock generation and distribution with power integrity Signal and power integrity design for I/O circuits Power integrity degradation and modeling Lumped, distributed, and 3D modeling for power integrity Chip temperature and PI impact Low-power techniques and PI impact Power integrity case study using the IBM POWER7+ processor chip Carbon nanotube interconnects for power delivery

On-Chip Power Delivery and Management
On-Chip Power Delivery and Management

Author: Inna P. Vaisband

Publisher: Springer

Published: 2016-04-26

Total Pages: 750

ISBN-13: 3319293958

DOWNLOAD EBOOK

This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

Power Distribution Networks in High Speed Integrated Circuits
Power Distribution Networks in High Speed Integrated Circuits

Author: Andrey Mezhiba

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 287

ISBN-13: 146150399X

DOWNLOAD EBOOK

Distributing power in high speed, high complexity integrated circuits has become a challenging task as power levels exceeding tens of watts have become commonplace while the power supply is plunging toward one volt. This book is dedicated to this important subject. The primary purpose of this monograph is to provide insight and intuition into the behavior and design of power distribution systems for high speed, high complexity integrated circuits.

Circuits at the Nanoscale
Circuits at the Nanoscale

Author: Krzysztof Iniewski

Publisher: CRC Press

Published: 2018-10-08

Total Pages: 686

ISBN-13: 1351834657

DOWNLOAD EBOOK

Circuits for Emerging Technologies Beyond CMOS New exciting opportunities are abounding in the field of body area networks, wireless communications, data networking, and optical imaging. In response to these developments, top-notch international experts in industry and academia present Circuits at the Nanoscale: Communications, Imaging, and Sensing. This volume, unique in both its scope and its focus, addresses the state-of-the-art in integrated circuit design in the context of emerging systems. A must for anyone serious about circuit design for future technologies, this book discusses emerging materials that can take system performance beyond standard CMOS. These include Silicon on Insulator (SOI), Silicon Germanium (SiGe), and Indium Phosphide (InP). Three-dimensional CMOS integration and co-integration with Microelectromechanical (MEMS) technology and radiation sensors are described as well. Topics in the book are divided into comprehensive sections on emerging design techniques, mixed-signal CMOS circuits, circuits for communications, and circuits for imaging and sensing. Dr. Krzysztof Iniewski is a director at CMOS Emerging Technologies, Inc., a consulting company in Vancouver, British Columbia. His current research interests are in VLSI ciruits for medical applications. He has published over 100 research papers in international journals and conferences, and he holds 18 international patents granted in the United States, Canada, France, Germany, and Japan. In this volume, he has assembled the contributions of over 60 world-reknown experts who are at the top of their field in the world of circuit design, advancing the bank of knowledge for all who work in this exciting and burgeoning area.

Power Distribution Networks with On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors

Author: Mikhail Popovich

Publisher: Springer Science & Business Media

Published: 2007-10-08

Total Pages: 532

ISBN-13: 0387716017

DOWNLOAD EBOOK

This book provides insight into the behavior and design of power distribution systems for high speed, high complexity integrated circuits. Also presented are criteria for estimating minimum required on-chip decoupling capacitance. Techniques and algorithms for computer-aided design of on-chip power distribution networks are also described; however, the emphasis is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.

Power Distribution Networks with On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors

Author: Renatas Jakushokas

Publisher: Springer Science & Business Media

Published: 2010-11-23

Total Pages: 636

ISBN-13: 1441978712

DOWNLOAD EBOOK

This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power distribution systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this second edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

Advanced Nanoscale ULSI Interconnects: Fundamentals and Applications
Advanced Nanoscale ULSI Interconnects: Fundamentals and Applications

Author: Yosi Shacham-Diamand

Publisher: Springer Science & Business Media

Published: 2009-09-19

Total Pages: 545

ISBN-13: 0387958681

DOWNLOAD EBOOK

In Advanced ULSI interconnects – fundamentals and applications we bring a comprehensive description of copper-based interconnect technology for ultra-lar- scale integration (ULSI) technology for integrated circuit (IC) application. In- grated circuit technology is the base for all modern electronics systems. You can ?nd electronics systems today everywhere: from toys and home appliances to a- planes and space shuttles. Electronics systems form the hardware that together with software are the bases of the modern information society. The rapid growth and vast exploitation of modern electronics system create a strong demand for new and improved electronic circuits as demonstrated by the amazing progress in the ?eld of ULSI technology. This progress is well described by the famous “Moore’s law” which states, in its most general form, that all the metrics that describe integrated circuit performance (e. g. , speed, number of devices, chip area) improve expon- tially as a function of time. For example, the number of components per chip d- bles every 18 months and the critical dimension on a chip has shrunk by 50% every 2 years on average in the last 30 years. This rapid growth in integrated circuits te- nology results in highly complex integrated circuits with an increasing number of interconnects on chips and between the chip and its package. The complexity of the interconnect network on chips involves an increasing number of metal lines per interconnect level, more interconnect levels, and at the same time a reduction in the interconnect line critical dimensions.