This text covers the analysis and design of all high-frequency oscillators required to realize integrated transceivers for wireless and wired applications. Starting with an in-depth review of basic oscillator theory, the authors provide a detailed analysis of many oscillator types and circuit topologies.
This book explores the unique advantages and large inherent transmission capacity of optical fiber communication systems. The long-term and high-risk research challenges of optical transceivers are analyzed with a view to sustaining the seemingly insatiable demand for bandwidth. A broad coverage of topics relating to the design of high-speed optical devices and integrated circuits, oriented to low power, low cost, and small area, is discussed.Written by specialists with many years of research and engineering experience in the field of optical fiber communication, this book is essential for an audience dedicated to the development of integrated electronic systems for optical communication applications. It can also be used as a supplementary text for graduate courses on optical transceiver IC design.
Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed: -Optimum circuit architecture tradeoff analysis -Simple speed and power trade-off analysis of active elements -High-order filtering response accuracy with respect to capacitor-ratio mismatches -Time-interleaved effect with respect to gain and offset mismatch -Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding -Stage noise analysis and allocation scheme -Substrate and supply noise reduction -Gain-and offset-compensation techniques -High-bandwidth low-power amplifier design and layout -Very low timing-skew multiphase generation Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highest dynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.
This book investigates solutions, benefits, limitations, and costs associated with multi-standard operation of RF front-ends and their ability to adapt to variable radio environments. Next, it highlights the optimization of RF front-ends to allow maximum performance within a certain power budget, while targeting full integration. Finally, the book investigates possibilities for low-voltage, low-power circuit topologies in CMOS technology.
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers. The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA’s behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.
Advanced concepts for wireless technologies present a vision of technology that is embedded in our surroundings and practically invisible. From established radio techniques like GSM, 802.11 or Bluetooth to more emerging technologies, such as Ultra Wide Band and smart dust motes, a common denominator for future progress is the underlying integrated circuit technology. Wireless Technologies responds to the explosive growth of standard cellular radios and radically different wireless applications by presenting new architectural and circuit solutions engineers can use to solve modern design problems. This reference addresses state-of-the art CMOS design in the context of emerging wireless applications, including 3G/4G cellular telephony, wireless sensor networks, and wireless medical application. Written by top international experts specializing in both the IC industry and academia, this carefully edited work uncovers new design opportunities in body area networks, medical implants, satellite communications, automobile radar detection, and wearable electronics. The book is divided into three sections: wireless system perspectives, chip architecture and implementation issues, and devices and technologies used to fabricate wireless integrated circuits. Contributors address key issues in the development of future silicon-based systems, such as scale of integration, ultra-low power dissipation, and the integration of heterogeneous circuit design style and processes onto one substrate. Wireless sensor network systems are now being applied in critical applications in commerce, healthcare, and security. This reference, which contains 25 practical and scientifically rigorous articles, provides the knowledge communications engineers need to design innovative methodologies at the circuit and system level.
Radio-frequency (RF) integrated circuits in CMOS technology are gaining increasing popularity in the commercial world, and CMOS technology has become the dominant technology for applications such as GPS receivers, GSM cellular transceivers, wireless LAN, and wireless short-range personal area networks based on IEEE 802.15.1 (Bluetooth) or IEEE 802.15.4 (ZigBee) standards. Furthermore, the increasing interest in wireless technologies and the widespread of wireless communications has prompted an ever increasing demand for radio frequency transceivers. Wireless Radio-Frequency Standards and System Design: Advanced Techniques provides perspectives on radio-frequency circuit and systems design, covering recent topics and developments in the RF area. Exploring topics such as LNA linearization, behavioral modeling and co-simulation of analog and mixed-signal complex blocks for RF applications, integrated passive devices for RF-ICs and baseband design techniques and wireless standards, this is a comprehensive reference for students as well as practicing professionals.
Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.
This title covers important physical-design issues that exist in contemporary analogue and mixed-signal design flows. The authors bring together many principles and techniques required to successfully develop and implement layout generation tools to accommodate many mixed-signal layout generation needs.
