This book constitutes the refereed post-proceedings of the First International Conference on Hardware Verification, Software Testing, and PADTAD held in November 2005. The conference combines the sixth IBM Verification Workshop, the fourth IBM Software Testing Workshop, and the third PADTAD (Parallel and Distributed Systems: Testing and Debugging) Workshop. The 14 revised full papers presented together with three invited contributions were carefully reviewed and selected from 31 submissions. The papers address all current issues in hardware/software verification, software testing, and testing of parallel and concurrent applications.
This volume contains the proceedings of the 3rd Haifa Veri?cation Conference (HVC 2007), whichtookplacein Haifa during October 2007. HVC isa forumfor researchers from both industry and academia to share and advance knowledge in the veri?cation of hardware and software systems. Academic research in veri?cation is generally divided into two paradigms - formal veri?cation and dynamic veri?cation (testing). Within each paradigm, di?erent algorithms and techniques are used for hardware and softwaresystems. Yet, attheircore, allofthesetechniquesaimtoachievethesamegoalofensuring the correct functionality of a complicated system. HVC is the only conference that brings together researchers from all four?elds, thereby encouraging the migration of methods and ideas between domains. With this goal in mind we established the HVC Award. This award rec- nizes a promising contribution to veri?cation published in the last few years. It is aimed at developments that signi?cantly advance the state of the art in veri?cation technology and show potential for future impact on di?erent ver- cation paradigms. The winners of the HVC Award are chosen by an indep- dent committee with experts from all?elds of veri?cation - both formal and dynamic, software and hardware. The winners of the 2007 HVC Award were Corina Pas?? areanu and Willem Visser, for their work on combining static and dynamic analysis. This year we received 32 submissions, out of which 15 were accepted after a thorough review conducted by the Program Committee (PC) and additional reviewers. Eachpaper wasreviewedby atleastthree reviewers, sometimes more.
This book constitutes the thoroughly refereed post-proceedings of the Second International Haifa Verification Conference, HVC 2006, held in Haifa, Israel, in October 2006. The 15 revised full papers presented together with 2 invited lectures are organized in three topical tracks on hardware verification technologies and methodologies, software testing, and tools for hardware verification and software testing.
This book constitutes the refereed proceedings of the 9th International Haifa Verification Conference, HVC 2013, held in Haifa, Israel in November 2013. The 24 revised full papers presented were carefully reviewed and selected from 49 submissions. The papers are organized in topical sections on SAT and SMT-based verification, software testing, supporting dynamic verification, specification and coverage, abstraction and model presentation.
This book constitutes the refereed proceedings of the 11th International Haifa Verification Conference, HVC 2015, held in Haifa, Israel, in November 2015. The 17 revised full papers and 4 invited talks presented were carefully reviewed and selected from numerous submissions. The papers are organized in topical sections on hybrid systems; tools; verification of robotics; symbolic execution; model checking; timed systems; SAT solving; multi domain verification; and synthesis.
This book fills the critical need for an in-depth technical reference providing the methods and techniques for building and maintaining confidence in many varities of system software. The intent is to help develop reliable answers to such critical questions as: 1) Are we building the right software for the need? and 2) Are we building the software right? Software Verification and Validation: An Engineering and Scientific Approach is structured for research scientists and practitioners in industry. The book is also suitable as a secondary textbook for advanced-level students in computer science and engineering.
This book constitutes the thoroughly refereed post-conference proceedings of the 6th International Haifa Verification Conference, HVC 2010, held in Haifa, Israel in October 2010. The 10 revised full papers presented together with 7 invited papers were carefully reviewed and selected from 30 submissions. The papers address all current issues, challenges and future directions of verification for hardware, software, and hybrid systems and have a research focus on hybrid methods and the migration of methods and ideas between hardware and software, static and dynamic analysis, pre- and post-silicon.
This book constitutes the refereed proceedings of the 13th International Haifa Verification Conference, HVC 2017, held in Haifa, Israel in November 2017.The 13 revised full papers presented together with 4 poster and 5 tool demo papers were carefully reviewed and selected from 45 submissions. They are dedicated to advance the state of the art and state of the practice in verification and testing and are discussing future directions of testing and verification for hardware, software, and complex hybrid systems.
This book constitutes the refereed post-proceedings of the First International Conference on Hardware Verification, Software Testing, and PADTAD held in November 2005. The conference combines the sixth IBM Verification Workshop, the fourth IBM Software Testing Workshop, and the third PADTAD (Parallel and Distributed Systems: Testing and Debugging) Workshop. The 14 revised full papers presented together with three invited contributions were carefully reviewed and selected from 31 submissions. The papers address all current issues in hardware/software verification, software testing, and testing of parallel and concurrent applications.
New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers. SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue. This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes (including timing errors; design for testability.
