Test and Design-for-Testability in Mixed-Signal Integrated Circuits
Test and Design-for-Testability in Mixed-Signal Integrated Circuits

Author: Jose Luis Huertas Díaz

Publisher: Springer Science & Business Media

Published: 2010-02-23

Total Pages: 310

ISBN-13: 0387235213

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Test and Design-for-Testability in Mixed-Signal Integrated Circuits deals with test and design for test of analog and mixed-signal integrated circuits. Especially in System-on-Chip (SoC), where different technologies are intertwined (analog, digital, sensors, RF); test is becoming a true bottleneck of present and future IC projects. Linking design and test in these heterogeneous systems will have a tremendous impact in terms of test time, cost and proficiency. Although it is recognized as a key issue for developing complex ICs, there is still a lack of structured references presenting the major topics in this area. The aim of this book is to present basic concepts and new ideas in a manner understandable for both professionals and students. Since this is an active research field, a comprehensive state-of-the-art overview is very valuable, introducing the main problems as well as the ways of solution that seem promising, emphasizing their basis, strengths and weaknesses. In essence, several topics are presented in detail. First of all, techniques for the efficient use of DSP-based test and CAD test tools. Standardization is another topic considered in the book, with focus on the IEEE 1149.4. Also addressed in depth is the connecting design and test by means of using high-level (behavioural) description techniques, specific examples are given. Another issue is related to test techniques for well-defined classes of integrated blocks, like data converters and phase-locked-loops. Besides these specification-driven testing techniques, fault-driven approaches are described as they offer potential solutions which are more similar to digital test methods. Finally, in Design-for-Testability and Built-In-Self-Test, two other concepts that were taken from digital design, are introduced in an analog context and illustrated for the case of integrated filters. In summary, the purpose of this book is to provide a glimpse on recent research results in the area of testing mixed-signal integrated circuits, specifically in the topics mentioned above. Much of the work reported herein has been performed within cooperative European Research Projects, in which the authors of the different chapters have actively collaborated. It is a representative snapshot of the current state-of-the-art in this emergent field.

Systematic Design for Optimisation of Pipelined ADCs
Systematic Design for Optimisation of Pipelined ADCs

Author: João Goes

Publisher: Springer Science & Business Media

Published: 2006-04-18

Total Pages: 171

ISBN-13: 0306481936

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This excellent reference proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters. The task is tackled by following a scientifically-consistent approach. The book may also be used as a text for advanced reading on the subject.

Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation
Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation

Author: Dimitrios Soudris

Publisher: Springer

Published: 2003-06-29

Total Pages: 349

ISBN-13: 3540453733

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This book constitutes the refereed proceedings of the 10th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2000, held in Göttingen, Germany in September 2000. The 33 revised full papers presented were carefully reviewed and selected for inclusion in the book. The papers are organized in sections on RTL power modeling, power estimation and optimization, system-level design, transistor level design, asynchronous circuit design, power efficient technologies, design of multimedia processing applications, adiabatic design and arithmetic modules, and analog-digital circuit modeling.

MicroCMOS Design
MicroCMOS Design

Author: Bang-Sup Song

Publisher: CRC Press

Published: 2017-12-19

Total Pages: 436

ISBN-13: 1351833898

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MicroCMOS Design covers key analog design methodologies with an emphasis on analog systems that can be integrated into systems-on-chip (SoCs). Starting at the transistor level, this book introduces basic concepts in the design of system-level complementary metal-oxide semiconductors (CMOS). It uses practical examples to illustrate circuit construction so that readers can develop an intuitive understanding rather than just assimilate the usual conventional analytical knowledge. As SoCs become increasingly complex, analog/radio frequency (RF) system designers have to master both system- and transistor-level design aspects. They must understand abstract concepts associated with large components, such as analog-to-digital converters (ADCs) and phase-locked loops (PLLs). To help readers along, this book discusses topics including: Amplifier basics & design Operational amplifier (Opamp) Data converter basics Nyquist-rate data converters Oversampling data converters High-resolution data converters PLL basics Frequency synthesis and clock recovery Focused more on design than analysis, this reference avoids lengthy equations and instead helps readers acquire a more hands-on mastery of the subject based on the application of core design concepts. Offering the needed perspective on the various design techniques for data converter and PLL design, coverage starts with abstract concepts—including discussion of bipolar junction transistors (BJTs) and MOS transistors—and builds up to an examination of the larger systems derived from microCMOS design.

High-Performance and High-Speed Pipelined ADCs
High-Performance and High-Speed Pipelined ADCs

Author: Manar El-Chammas

Publisher: Springer Nature

Published: 2023-05-19

Total Pages: 161

ISBN-13: 3031297008

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This book discusses the theoretical foundations and design techniques needed to effectively design high-speed (multi-GS/s) and high-performance pipelined ADCs, which play a critical role in the signal chain of various systems. Readers will be walked through the design and analysis of pipelined ADCs and their topologies, and will learn both theoretical and practical design details that will enable them to explore and build these data converters. The author also presents details on various aspects of pipelined ADCs and their impact on the ADC speed and performance, with a focus on the input buffer and sampling network, the reference amplifier, comparators and their impact on ADC error rate and high-frequency performance, and mismatch estimation and correction.

Machine Learning-based Design and Optimization of High-Speed Circuits
Machine Learning-based Design and Optimization of High-Speed Circuits

Author: Vazgen Melikyan

Publisher: Springer Nature

Published: 2024-01-31

Total Pages: 351

ISBN-13: 3031507142

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This book describes machine learning-based new principles, methods of design and optimization of high-speed integrated circuits, included in one electronic system, which can exchange information between each other up to 128/256/512 Gbps speed. The efficiency of methods has been proven and is described on the examples of practical designs. This will enable readers to use them in similar electronic system designs. The author demonstrates newly developed principles and methods to accelerate communication between ICs, working in non-standard operating conditions, considering signal deviation compensation with linearity self-calibration. The observed circuit types also include but are not limited to mixed-signal, high performance heterogeneous integrated circuits as well as digital cores.

Pipelined Analog-to-digital Conversion Using Class-AB Amplifiers
Pipelined Analog-to-digital Conversion Using Class-AB Amplifiers

Author: Kyung Ryun Kim

Publisher: Stanford University

Published: 2010

Total Pages: 128

ISBN-13:

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In high-performance pipelined analog-to-digital converters (ADCs), the residue amplifiers dissipate the majority of the overall converter power. Therefore, finding alternatives to the relatively inefficient, conventional class-A circuit realization is an active area of research. One option for improvement is to employ class-AB amplifiers, which can, in principle, provide large drive currents on demand and improve the efficiency of residue amplification. Unfortunately, due to the simultaneous demand for high speed and high gain in pipelined ADCs, the improvements seen in class-AB designs have so far been limited. This dissertation presents the design of an efficient class-AB amplification scheme based on a pseudo-differential, single-stage and cascode-free architecture. Nonlinear errors due to finite DC gain are addressed using a deterministic digital background calibration that measures the circuit imperfections in time intervals between normal conversion cycles of the ADC. As a proof of concept, a 12-bit 30-MS/s pipelined ADC was realized using class-AB amplifiers with the proposed digital calibration. The prototype ADC occupies an active area of 0.36 mm2 in 90-nm CMOS. It dissipates 2.95 mW from a 1.2-V supply and achieves an SNDR of 64.5 dB for inputs near the Nyquist frequency. The corresponding figure of merit is 72 fJ/conversion-step.