Design of High-Performance CMOS Voltage-Controlled Oscillators
Design of High-Performance CMOS Voltage-Controlled Oscillators

Author: Liang Dai

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 170

ISBN-13: 1461511453

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Design of High-Performance CMOS Voltage-Controlled Oscillators presents a phase noise modeling framework for CMOS ring oscillators. The analysis considers both linear and nonlinear operation. It indicates that fast rail-to-rail switching has to be achieved to minimize phase noise. Additionally, in conventional design the flicker noise in the bias circuit can potentially dominate the phase noise at low offset frequencies. Therefore, for narrow bandwidth PLLs, noise up conversion for the bias circuits should be minimized. We define the effective Q factor (Qeff) for ring oscillators and predict its increase for CMOS processes with smaller feature sizes. Our phase noise analysis is validated via simulation and measurement results. The digital switching noise coupled through the power supply and substrate is usually the dominant source of clock jitter. Improving the supply and substrate noise immunity of a PLL is a challenging job in hostile environments such as a microprocessor chip where millions of digital gates are present.

Transformer-Based Design Techniques for Oscillators and Frequency Dividers
Transformer-Based Design Techniques for Oscillators and Frequency Dividers

Author: Howard Cam Luong

Publisher: Springer

Published: 2015-10-07

Total Pages: 214

ISBN-13: 3319158740

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This book provides in-depth coverage of transformer-based design techniques that enable CMOS oscillators and frequency dividers to achieve state-of-the-art performance. Design, optimization, and measured performance of oscillators and frequency dividers for different applications are discussed in detail, focusing on not only ultra-low supply voltage but also ultra-wide frequency tuning range and locking range. This book will be an invaluable reference for anyone working or interested in CMOS radio-frequency or mm-Wave integrated circuits and systems.

Millimeter-Wave Voltage-Controlled Oscillators in 0.13-micrometer CMOS Technology
Millimeter-Wave Voltage-Controlled Oscillators in 0.13-micrometer CMOS Technology

Author:

Publisher:

Published: 2006

Total Pages: 9

ISBN-13:

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This paper describes the design of CMOS millimeter-wave voltage controlled oscillators. Varactor, transistor, and inductor designs are optimized to reduce the parasitic capacitances. An investigation of tradeoff between quality factor and tuning range for MOS varactors at 24 GHz has shown that the polysilicon gate lengths between 0.18 and 0.24 micrometer result in both good quality factor (>12) and Cmax/Cmin ratio (~3) in the 0.13-micrometer CMOS process used for the study. The components were utilized to realize a VCO operating around 60 GHz with a tuning range of 5.8 GHz. A 99-GHz VCO with a tuning range of 2.5 GHz, phase noise of --102.7 dBc/Hz at 10-MHz offset and power consumption of 7-15 mW from a 1.5-V supply and a 105-GHz VCO are also demonstrated. This is the CMOS circuit with the highest fundamental operating frequency. The lumped element approach can be used even for VCOs operating near 100-GHz and it results in a smaller circuit area.

RF and Microwave Transistor Oscillator Design
RF and Microwave Transistor Oscillator Design

Author: Andrei Grebennikov

Publisher: John Wiley & Sons

Published: 2007-04-30

Total Pages: 458

ISBN-13: 9780470512081

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The increase of consumer electronics and communications applications using Radio Frequency (RF) and microwave circuits has implications for oscillator design. Applications working at higher frequencies and using novel technologies have led to a demand for more robust circuits with higher performance and functionality, but decreased costs, size and power consumption. As a result, there is also a need for more efficient oscillators. This book presents up to date information on all aspects of oscillator design, enabling a selection of the best oscillator topologies with optimized noise reduction and electrical performance. RF and Microwave Transistor Oscillator Design covers: analyses of non-linear circuit design methods including spectral-domain analysis, time-domain analysis and the quasilinear method; information on noise in oscillators including chapters on varactor and oscillator frequency tuning, CMOS voltage-controlled oscillators and wideband voltage-controlled oscillators; information on the stability of oscillations, with discussions on the stability of multi-resonant circuits and the phase plane method; optimized design and circuit techniques, beginning with the empirical and analytic design approaches, moving on to the high-efficiency design technique; general operation and design principles of oscillators, including a section on the historical aspects of oscillator configurations. A valuable reference for practising RF and Microwave designers and engineers, RF and Microwave Transistor Oscillator Design is also useful for lecturers, advanced students and research and design (R&D) personnel.

Design, Simulation and Applications of Inductors and Transformers for Si RF ICs
Design, Simulation and Applications of Inductors and Transformers for Si RF ICs

Author: Ali M. Niknejad

Publisher: Springer Science & Business Media

Published: 2005-12-15

Total Pages: 193

ISBN-13: 0306470381

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The modern wireless communication industry has put great demands on circuit designers for smaller, cheaper transceivers in the gigahertz frequency range. One tool which has assisted designers in satisfying these requirements is the use of on-chip inductiveelements (inductors and transformers) in silicon (Si) radio-frequency (RF) integrated circuits (ICs). These elements allow greatly improved levels of performance in Si monolithic low-noise amplifiers, power amplifiers, up-conversion and down-conversion mixers and local oscillators. Inductors can be used to improve the intermodulation distortion performance and noise figure of small-signal amplifiers and mixers. In addition, the gain of amplifier stages can be enhanced and the realization of low-cost on-chip local oscillators with good phase noise characteristics is made feasible. In order to reap these benefits, it is essential that the IC designer be able to predict and optimize the characteristics of on-chip inductiveelements. Accurate knowledge of inductance values, quality factor (Q) and the influence of ad- cent elements (on-chip proximity effects) and substrate losses is essential. In this book the analysis, modeling and application of on-chip inductive elements is considered. Using analyses based on Maxwells equations, an accurate and efficient technique is developed to model these elements over a wide frequency range. Energy loss to the conductive substrate is modeled through several mechanisms, including electrically induced displacement and conductive c- rents and by magnetically induced eddy currents. These techniques have been compiled in a user-friendly software tool ASITIC (Analysis and Simulation of Inductors and Transformers for Integrated Circuits).

RF CMOS Oscillators for Modern Wireless Applications
RF CMOS Oscillators for Modern Wireless Applications

Author: Masoud Babaie

Publisher: CRC Press

Published: 2022-09-01

Total Pages: 237

ISBN-13: 1000794431

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While mobile phones enjoy the largest production volume ever of any consumer electronics products, the demands they place on radio-frequency (RF) transceivers are particularly aggressive, especially on integration with digital processors, low area, low power consumption, while being robust against process-voltage-temperature variations. Since mobile terminals inherently operate on batteries, their power budget is severely constrained. To keep up with the ever increasing data-rate, an ever-decreasing power per bit is required to maintain the battery lifetime. The RF oscillator is the second most power-hungry block of a wireless radio (after power amplifiers). Consequently, any power reduction in an RF oscillator will greatly benefit the overall power efficiency of the cellular transceiver. Moreover, the RF oscillators' purity limits the transceiver performance. The oscillator's phase noise results in power leakage into adjacent channels in a transmit mode and reciprocal mixing in a receive mode. On the other hand, the multi-standard and multi-band transceivers that are now trending demand wide tuning range oscillators. However, broadening the oscillator’s tuning range is usually at the expense of die area (cost) or phase noise. The main goal of this book is to bring forth the exciting and innovative RF oscillator structures that demonstrate better phase noise performance, lower cost, and higher power efficiency than currently achievable. Technical topics discussed in RF CMOS Oscillators for Modern Wireless Applications include:  Design and analysis of low phase-noise class-F oscillators Analyze a technique to reduce 1/f noise up-conversion in the oscillators Design and analysis of low power/low voltage oscillators Wide tuning range oscillators Reliability study of RF oscillators in nanoscale CMOS

Design of Fractional-N Phase Locked Loops for Frequency Synthesis from 30 to 40 GHz
Design of Fractional-N Phase Locked Loops for Frequency Synthesis from 30 to 40 GHz

Author: George Gal

Publisher:

Published: 2013

Total Pages:

ISBN-13:

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"High-frequency fractional-N PLLs in CMOS technology in the 30 to 40 GHz are very dicult to design when considering power, area, phase noise requirements and frequency range of operation. One of the diculties is to synthesize the loop lter of the PLL such that it meets the phase noise characteristics using the information available for all the components that make up the PLL. At the same time, predicting the phase noise output of the PLL using extracted layout results takes a long time to simulate and often the solution does not converge, thereby lengthening the design cycle. This thesis proposes a new methodology for designing high performance wide-band fractional-N PLLs in the 30-40 GHz range. The method begins by rst designing the phase-frequency detector/charge-pump, voltage-controlled oscillator and frequency divider circuit for realization in a specic CMOS technology. The method of choice mixes insight deemed from both a theoretical and simulation perspective. Next, the loop lter is derived based on the layout extracted behaviour of each component. Once complete, all components of the PLL are described using the high-level description language of Verilog-A available in the Cadence tool set over its full range of operating characteristics. Ideally, these components would be fabricated rst and characterized afterward. The Verilog-A description of the PLL enables a fast and ecient simulation of the complete PLL in a closed-loop conguration. This latter steps allows further optimization of the overall design. Two chips have been fabricated; one in a 0.13 m CMOS process from IBM and another in a 65 nm CMOS process from TSMC. One chip contain the design of a 28 GHz VCO and another containing the design of a programmable frequency divider circuit. Experimental results for both chip are provided." --