Finite Buffer Analysis of Multistage Interconnection Networks

Finite Buffer Analysis of Multistage Interconnection Networks

Author: Jianxun Ding

Publisher:

Published: 1992

Total Pages: 34

ISBN-13:

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Abstract: "In this correspondence, we propose a design and analysis technique for a class of Multistage Interconnection Networks (MINs). This class of MINs have finite buffers at the input side of their switch elements and operate in a synchronous packet-switched mode. We first examine the important issue of different clock periods in the synchronous MIN analysis. Then we analyze our 'small cycle' design with a simple analytical model and compare the results with that of a somewhat standard 'big cycle' model that is currently used. The significant performance improvement of our model is shown based on various clock width, data width, and buffer length."


Favorite Load Analysis of Multistage Interconnection Networks with Split Buffers

Favorite Load Analysis of Multistage Interconnection Networks with Split Buffers

Author: Jianxun Ding

Publisher:

Published: 1992

Total Pages: 40

ISBN-13:

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Abstract: "This paper concerns the analysis of the Split-buffered Multistage Interconnection Networks (SMINs) under the favorite input load. The favorite load is a typical nonuniform traffic pattern which includes the uniform load as its special case. A new analytical model of SMINs under the favorite load is developed. The analytical results are validated through simulations. It is shown that the SMINs generally perform better under the favorite load than the SMINs under the uniform load. The analytical model itself also shows potential for evaluating other high performance switch designs."


Conservative Parallel Simulation of Finite Buffered Multistage Interconnection Networks

Conservative Parallel Simulation of Finite Buffered Multistage Interconnection Networks

Author: National University of Singapore. Dept. of Information Systems and Computer Science

Publisher:

Published: 1994

Total Pages: 24

ISBN-13:

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Abstract: "Multistage interconnection networks are used in a number of application areas such as parallel computers and high-speed communication systems. As the performance of these systems lies on an efficient design of the interconnection network, a thorough analysis of the network's performance is important. Mathematical analysis so far provides inadequate results and simulation analysis using a uniprocessor usually requires long hours to evaluate large networks. In this paper, parallel simulation technique is used to speedup the execution. The conventional null-message approach to resolving deadlock problem in conservative simulation is based on a lookahead mechanism. For some application domains, unfortunately, the lookahead information is not available. Consequently, parallel simulation using null messages can result in livelock. We propose a deadlock/livelock free scheme using null messages, but without the guaranteed lookahead, to coordinate the simulation. In addition, we investigate different partitioning and transformation techniques for mapping a simulation program onto multicomputers. A flushing mechanism to address the combinatoric explosion of using null- message in conservative simulation is also discussed. Our analysis shows that the proposed flushing mechanism effectively reduces the number of null messages from exponential to linear."


Performance Analysis of Network Architectures

Performance Analysis of Network Architectures

Author: Dietmar Tutsch

Publisher: Springer Science & Business Media

Published: 2007-05-17

Total Pages: 248

ISBN-13: 3540343105

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Three approaches can be applied to determine the performance of parallel and distributed computer systems: measurement, simulation, and mathematical methods. This book introduces various network architectures for parallel and distributed systems as well as for systems-on-chips, and presents a strategy for developing a generator for automatic model derivation. It will appeal to researchers and students in network architecture design and performance analysis.