This book constitutes the proceedings of the 18th International Conference on Cryptographic Hardware and Embedded Systems, CHES 2016, held in Santa Barbara, CA, USA, in August 2016. The 30 full papers presented in this volume were carefully reviewed and selected from 148 submissions. They were organized in topical sections named: side channel analysis; automotive security; invasive attacks; side channel countermeasures; new directions; software implementations; cache attacks; physical unclonable functions; hardware implementations; and fault attacks.
This book constitutes the proceedings of the 19th International Conference on Cryptographic Hardware and Embedded Systems, CHES 2017, held in Taipei, Taiwan, in September 2017. The 33 full papers presented in this volume were carefully reviewed and selected from 130 submissions. The annual CHES conference highlights new results in the design and analysis of cryptographic hardware and soft- ware implementations. The workshop builds a valuable bridge between the research and cryptographic engineering communities and attracts participants from industry, academia, and government organizations.
This book constitutes the proceedings of the 14th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2012, held in Leuven, Belgium, in September 2012. The 32 papers presented together with 1 invited talk were carefully reviewed and selected from 120 submissions. The papers are organized in the following topical sections: intrusive attacks and countermeasures; masking; improved fault attacks and side channel analysis; leakage resiliency and security analysis; physically unclonable functions; efficient implementations; lightweight cryptography; we still love RSA; and hardware implementations.
Machine learning is a potential solution to resolve bottleneck issues in VLSI via optimizing tasks in the design process. This book aims to provide the latest machine-learning–based methods, algorithms, architectures, and frameworks designed for VLSI design. The focus is on digital, analog, and mixed-signal design techniques, device modeling, physical design, hardware implementation, testability, reconfigurable design, synthesis and verification, and related areas. Chapters include case studies as well as novel research ideas in the given field. Overall, the book provides practical implementations of VLSI design, IC design, and hardware realization using machine learning techniques. Features: Provides the details of state-of-the-art machine learning methods used in VLSI design Discusses hardware implementation and device modeling pertaining to machine learning algorithms Explores machine learning for various VLSI architectures and reconfigurable computing Illustrates the latest techniques for device size and feature optimization Highlights the latest case studies and reviews of the methods used for hardware implementation This book is aimed at researchers, professionals, and graduate students in VLSI, machine learning, electrical and electronic engineering, computer engineering, and hardware systems.
This book provides an overview of emerging topics in the field of hardware security, such as artificial intelligence and quantum computing, and highlights how these technologies can be leveraged to secure hardware and assure electronics supply chains. The authors are experts in emerging technologies, traditional hardware design, and hardware security and trust. Readers will gain a comprehensive understanding of hardware security problems and how to overcome them through an efficient combination of conventional approaches and emerging technologies, enabling them to design secure, reliable, and trustworthy hardware.
This book addresses the issue of Machine Learning (ML) attacks on Integrated Circuits through Physical Unclonable Functions (PUFs). It provides the mathematical proofs of the vulnerability of various PUF families, including Arbiter, XOR Arbiter, ring-oscillator, and bistable ring PUFs, to ML attacks. To achieve this goal, it develops a generic framework for the assessment of these PUFs based on two main approaches. First, with regard to the inherent physical characteristics, it establishes fit-for-purpose mathematical representations of the PUFs mentioned above, which adequately reflect the physical behavior of these primitives. To this end, notions and formalizations that are already familiar to the ML theory world are reintroduced in order to give a better understanding of why, how, and to what extent ML attacks against PUFs can be feasible in practice. Second, the book explores polynomial time ML algorithms, which can learn the PUFs under the appropriate representation. More importantly, in contrast to previous ML approaches, the framework presented here ensures not only the accuracy of the model mimicking the behavior of the PUF, but also the delivery of such a model. Besides off-the-shelf ML algorithms, the book applies a set of algorithms hailing from the field of property testing, which can help to evaluate the security of PUFs. They serve as a “toolbox”, from which PUF designers and manufacturers can choose the indicators most relevant for their requirements. Last but not least, on the basis of learning theory concepts, the book explicitly states that the PUF families cannot be considered as an ultimate solution to the problem of insecure ICs. As such, it provides essential insights into both academic research on and the design and manufacturing of PUFs.
The research community lacks both the capability to explain the effectiveness of existing techniques and the metrics to predict the security properties and vulnerabilities of the next generation of nano-devices and systems. This book provides in-depth viewpoints on security issues and explains how nano devices and their unique properties can address the opportunities and challenges of the security community, manufacturers, system integrators, and end users. This book elevates security as a fundamental design parameter, transforming the way new nano-devices are developed. Part 1 focuses on nano devices and building security primitives. Part 2 focuses on emerging technologies and integrations.
This book explores new and novel applications of machine learning, deep learning, and artificial intelligence that are related to major challenges in the field of cybersecurity. The provided research goes beyond simply applying AI techniques to datasets and instead delves into deeper issues that arise at the interface between deep learning and cybersecurity. This book also provides insight into the difficult "how" and "why" questions that arise in AI within the security domain. For example, this book includes chapters covering "explainable AI", "adversarial learning", "resilient AI", and a wide variety of related topics. It’s not limited to any specific cybersecurity subtopics and the chapters touch upon a wide range of cybersecurity domains, ranging from malware to biometrics and more. Researchers and advanced level students working and studying in the fields of cybersecurity (equivalently, information security) or artificial intelligence (including deep learning, machine learning, big data, and related fields) will want to purchase this book as a reference. Practitioners working within these fields will also be interested in purchasing this book.
Provides a comprehensive introduction to the latest research in networking Explores implementation issues and research challenges Focuses on applications and enabling technologies Covers wireless technologies, Big Data, IoT, and other emerging research areas Features contributions from worldwide experts
