Substrate Noise Coupling in Mixed-Signal ASICs

Substrate Noise Coupling in Mixed-Signal ASICs

Author: Stéphane Donnay

Publisher: Springer Science & Business Media

Published: 2006-05-31

Total Pages: 311

ISBN-13: 0306481707

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This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.


Noise Coupling in System-on-Chip

Noise Coupling in System-on-Chip

Author: Thomas Noulis

Publisher: CRC Press

Published: 2018-01-09

Total Pages: 555

ISBN-13: 1351642782

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Noise Coupling is the root-cause of the majority of Systems on Chip (SoC) product fails. The book discusses a breakthrough substrate coupling analysis flow and modelling toolset, addressing the needs of the design community. The flow provides capability to analyze noise components, propagating through the substrate, the parasitic interconnects and the package. Using this book, the reader can analyze and avoid complex noise coupling that degrades RF and mixed signal design performance, while reducing the need for conservative design practices. With chapters written by leading international experts in the field, novel methodologies are provided to identify noise coupling in silicon. It additionally features case studies that can be found in any modern CMOS SoC product for mobile communications, automotive applications and readout front ends.


Low-power HF Microelectronics

Low-power HF Microelectronics

Author: Gerson A. S. Machado

Publisher: IET

Published: 1996

Total Pages: 1072

ISBN-13: 9780852968741

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This book brings together innovative modelling, simulation and design techniques in CMOS, SOI, GaAs and BJT to achieve successful high-yield manufacture for low-power, high-speed and reliable-by-design analogue and mixed-mode integrated systems.


Analyse Et Caractérisation Des Couplages Substrat Et de la Connectique Dans Les Circuits 3D

Analyse Et Caractérisation Des Couplages Substrat Et de la Connectique Dans Les Circuits 3D

Author: Fengyuan Sun

Publisher: Editions Publibook

Published: 2016

Total Pages: 178

ISBN-13: 2753903298

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The proposal of doubling the number of transistors on an IC chip (with minimum costs and subtle innovations) every 24 months by Gordon Moore in 1965 (the so-called called Moore's law) has been the most powerful driver for the emphasis of the microelectronics industry in the past 50 years. This law enhances lithography scaling and integration, in 2D, of all functions on a single chip, increasingly through system-on-chip (SOC). On the other hand, the integration of all these functions can be achieved through 3D integrations . Generally speaking, 3D integration consists of 3D IC packaging, 3D IC integration, and 3D Si integration. They are different and mostly the TSV (through-silicon via) separates 3D IC packaging from 3D IC/Si integrations since the latter two uses TSVs, but 3D IC packaging does not. TSV (with a new concept that every chip or interposer could have two surfaces with circuits) is the heart of 3D IC/Si integrations. Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, and hence there exist many difficult engineering challenges, most notably in power management, noise isolation, and intra and inter-chip communication. 3D Si integration is the right way to go and compete with Moore's law (more than Moore versus more Moore). However, it is still a long way to go. In this book, Fengyuan SUN proposes new substrate network extraction techniques. Using this latter, the substrate coupling and loss in IC's can be analyzed. He implements some Green/TLM (Transmission Line Matrix) algorithms in MATLAB. It permits to extract impedances between any number of embedded contacts or/and TSVS. He does investigate models of high aspect ratio TSV, on both analytical and numerical methods electromagnetic simulations. This model enables to extract substrate and TSV impedance, S parameters and parasitic elements, considering the variable resistivity of the substrate. It is full compatible with SPICE-like solvers and should allow an investigation in depth of TSV impact on circuit performance.


Advances in Analog Circuits

Advances in Analog Circuits

Author: Esteban Tlelo-Cuautle

Publisher: BoD – Books on Demand

Published: 2011-02-02

Total Pages: 384

ISBN-13: 9533073233

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This book highlights key design issues and challenges to guarantee the development of successful applications of analog circuits. Researchers around the world share acquired experience and insights to develop advances in analog circuit design, modeling and simulation. The key contributions of the sixteen chapters focus on recent advances in analog circuits to accomplish academic or industrial target specifications.


Integrated Circuit and System Design

Integrated Circuit and System Design

Author: Enrico Macii

Publisher: Springer

Published: 2004-08-24

Total Pages: 926

ISBN-13: 3540302050

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WelcometotheproceedingsofPATMOS2004,thefourteenthinaseriesofint- national workshops. PATMOS 2004 was organized by the University of Patras with technical co-sponsorship from the IEEE Circuits and Systems Society. Over the years, the PATMOS meeting has evolved into an important - ropean event, where industry and academia meet to discuss power and timing aspects in modern integrated circuit and system design. PATMOS provides a forum for researchers to discuss and investigate the emerging challenges in - sign methodologies and tools required to develop the upcoming generations of integrated circuits and systems. We realized this vision this year by providing a technical program that contained state-of-the-art technical contributions, a keynote speech, three invited talks and two embedded tutorials. The technical program focused on timing, performance and power consumption, as well as architectural aspects, with particular emphasis on modelling, design, charac- rization, analysis and optimization in the nanometer era. This year a record 152 contributions were received to be considered for p- sible presentation at PATMOS. Despite the choice for an intense three-day m- ting, only 51 lecture papers and 34 poster papers could be accommodated in the single-track technical program. The Technical Program Committee, with the - sistance of additional expert reviewers, selected the 85 papers to be presented at PATMOS and organized them into 13 technical sessions. As was the case with the PATMOS workshops, the review process was anonymous, full papers were required, and several reviews were received per manuscript.


Computer-Aided Design of Analog Integrated Circuits and Systems

Computer-Aided Design of Analog Integrated Circuits and Systems

Author: Rob A. Rutenbar

Publisher: John Wiley & Sons

Published: 2002-05-06

Total Pages: 773

ISBN-13: 047122782X

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The tools and techniques you need to break the analog design bottleneck! Ten years ago, analog seemed to be a dead-end technology. Today, System-on-Chip (SoC) designs are increasingly mixed-signal designs. With the advent of application-specific integrated circuits (ASIC) technologies that can integrate both analog and digital functions on a single chip, analog has become more crucial than ever to the design process. Today, designers are moving beyond hand-crafted, one-transistor-at-a-time methods. They are using new circuit and physical synthesis tools to design practical analog circuits; new modeling and analysis tools to allow rapid exploration of system level alternatives; and new simulation tools to provide accurate answers for analog circuit behaviors and interactions that were considered impossible to handle only a few years ago. To give circuit designers and CAD professionals a better understanding of the history and the current state of the art in the field, this volume collects in one place the essential set of analog CAD papers that form the foundation of today's new analog design automation tools. Areas covered are: * Analog synthesis * Symbolic analysis * Analog layout * Analog modeling and analysis * Specialized analog simulation * Circuit centering and yield optimization * Circuit testing Computer-Aided Design of Analog Integrated Circuits and Systems is the cutting-edge reference that will be an invaluable resource for every semiconductor circuit designer and CAD professional who hopes to break the analog design bottleneck.


Analog Circuit Design

Analog Circuit Design

Author: Johan Huijsing

Publisher: Springer Science & Business Media

Published: 2013-03-09

Total Pages: 410

ISBN-13: 1475729839

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This volume of Analog Circuit Design concentrates on three topics: Volt Electronics; Design and Implementation of Mixed-Mode Systems; Low-Noise and RF Power Amplifiers for Telecommunication. The book comprises six papers on each topic written by internationally recognised experts. These papers are tutorial in nature and together make a substantial contribution to improving the design of analog circuits. The book is divided into three parts: Part I, Volt Electronics, presents some of the circuit design challenges which are having to be met as the need for more electronics on a chip forces smaller transistor dimensions, and thus lower breakdown voltages. The papers cover techniques for 1-Volt electronics. Part II, Design and Implementation of Mixed-Mode Systems, deals with the various problems that are encountered in mixed analog-digital design. In the future, all integrated circuits are bound to contain both digital and analog sub-blocks. Problems such as substrate bounce and other substrate coupling effects cause deterioration in signal integrity. Both aspects of mixed-signal design have been addressed in this section and it illustrates that careful layout techniques embedded in a hierarchical design methodology can allow us to cope with most of the challenges presented by mixed analog-digital design. Part III, Low-noise and RF Power Amplifiers for Telecommunication, focuses on telecommunications systems. In these systems low-noise amplifiers are front-ends of receiver designs. At the transmitter part a high-performance, high-efficiency power amplifier is a critical design. Examples of both system parts are described in this section. Analog Circuit Design is an essential reference source for analog design engineers and researchers wishing to keep abreast with the latest developments in the field. The tutorial nature of the contributions also makes it suitable for use in an advanced course.


Design of Very High-Frequency Multirate Switched-Capacitor Circuits

Design of Very High-Frequency Multirate Switched-Capacitor Circuits

Author: Ben U Seng Pan

Publisher: Springer Science & Business Media

Published: 2006-07-02

Total Pages: 250

ISBN-13: 0387261222

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Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed: -Optimum circuit architecture tradeoff analysis -Simple speed and power trade-off analysis of active elements -High-order filtering response accuracy with respect to capacitor-ratio mismatches -Time-interleaved effect with respect to gain and offset mismatch -Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding -Stage noise analysis and allocation scheme -Substrate and supply noise reduction -Gain-and offset-compensation techniques -High-bandwidth low-power amplifier design and layout -Very low timing-skew multiphase generation Two tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highest dynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.


Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters

Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters

Author: Sai-Weng Sin

Publisher: Springer Science & Business Media

Published: 2010-09-29

Total Pages: 147

ISBN-13: 9048197104

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Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.