Substrate Noise Coupling in Mixed-Signal ASICs

Substrate Noise Coupling in Mixed-Signal ASICs

Author: Stéphane Donnay

Publisher: Springer Science & Business Media

Published: 2006-05-31

Total Pages: 311

ISBN-13: 0306481707

DOWNLOAD EBOOK

This book is the first in a series of three dedicated to advanced topics in Mixed-Signal IC design methodologies. It is one of the results achieved by the Mixed-Signal Design Cluster, an initiative launched in 1998 as part of the TARDIS project, funded by the European Commission within the ESPRIT-IV Framework. This initiative aims to promote the development of new design and test methodologies for Mixed-Signal ICs, and to accelerate their adoption by industrial users. As Microelectronics evolves, Mixed-Signal techniques are gaining a significant importance due to the wide spread of applications where an analog front-end is needed to drive a complex digital-processing subsystem. In this sense, Analog and Mixed-Signal circuits are recognized as a bottleneck for the market acceptance of Systems-On-Chip, because of the inherent difficulties involved in the design and test of these circuits. Specially, problems arising from the use of a common substrate for analog and digital components are a main limiting factor. The Mixed-Signal Cluster has been formed by a group of 11 Research and Development projects, plus a specific action to promote the dissemination of design methodologies, techniques, and supporting tools developed within the Cluster projects. The whole action, ending in July 2002, has been assigned an overall budget of more than 8 million EURO.


Substrate Noise Coupling in Mixed-Signal ASICs

Substrate Noise Coupling in Mixed-Signal ASICs

Author: Stéphane Donnay

Publisher: Springer Science & Business Media

Published: 2003-02-28

Total Pages: 311

ISBN-13: 140207381X

DOWNLOAD EBOOK

Driven by applications such as telecommunications, computing and consumer/multimedia and facilitated by the progress in CMOS ULSI technology, the microelectronics IC market is characterized by an ever-increasing level of integration complexity. Today complete systems, that previously occupied one or more boards, are integrated on a few chips or even on one single multi-million transistor chip - a so called System-on-Chip (SoC). Although most functions in such integrated systems are implemented with digital or digital signal processing circuitry, the analog circuits needed at the interface between the electronic system and the continuous-valued outside world are also being integrated on the same die for reasons of cost and performance. Unfortunately, the integration of both analog & RF circuits and digital circuits on the same die not only offers many benefits, but also creates some technical difficulties. Since the analog circuits exploit the low-level physics of the fabrication process, they remain difficult and costly to design, but they are also vulnerable to any kind of noise or crosstalk signals. The higher levels of integration (moving towards 100 million transistors per chip clocked at ever higher frequencies) make the mixed-signal signal integrity problem increasingly challenging. One of the most important problems is the parasitic supply and substrate noise coupling, caused by the fast switching of the digital circuitry that then propagates to the sensitive analog circuitry via the common substrate. It is therefore important to be able to predict the impact of digital switching noise on the analog circuit performance at the design stage of the integrated system, before the chip is taped out for fabrication, and to understand how this problem can be reduced. The purpose of Substrate Noise Coupling in Mixed-Signal ASICs is to provide an overview of very recent research results in the field of substrate noise analysis and reduction techniques. Much of the reported work has been established as part of the Mixed-Signal Initiative of the European Union. It is a representative sampling of the current state of the art in this area. All the different aspects of the substrate noise coupling problem are covered. Some chapters describe techniques to model and reduce the digital switching noise injected in the substrate. Other chapters describe methods to analyse the propagation of the noise from the source (the digital circuitry) to the reception point (the embedded analog circuitry) through the substrate considered as a resistive/capacitive mesh. Finally, the remaining chapters describe techniques to model and especially to reduce the impact of substrate noise on the analog side. This is illustrated with several practical design examples and measurement results.


Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs

Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs

Author: X. Aragones

Publisher: Springer Science & Business Media

Published: 2013-03-09

Total Pages: 242

ISBN-13: 1475730136

DOWNLOAD EBOOK

Modern microelectronic design is characterized by the integration of full systems on a single die. These systems often include large high performance digital circuitry, high resolution analog parts, high driving I/O, and maybe RF sections. Designers of such systems are constantly faced with the challenge to achieve compatibility in electrical characteristics of every section: some circuitry presents fast transients and large consumption spikes, whereas others require quiet environments to achieve resolutions well beyond millivolts. Coupling between those sections is usually unavoidable, since the entire system shares the same silicon substrate bulk and the same package. Understanding the way coupling is produced, and knowing methods to isolate coupled circuitry, and how to apply every method, is then mandatory knowledge for every IC designer. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an in-depth look at coupling through the common silicon substrate, and noise at the power supply lines. It explains the elementary knowledge needed to understand these phenomena and presents a review of previous works and new research results. The aim is to provide an understanding of the reasons for these particular ways of coupling, review and suggest solutions to noise coupling, and provide criteria to apply noise reduction. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an ideal book, both as introductory material to noise-coupling problems in mixed-signal ICs, and for more advanced designers facing this problem.


Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs

Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs

Author: Xavier Aragones

Publisher: The Rosen Publishing Group

Published: 1999-04-30

Total Pages: 250

ISBN-13: 9780792385042

DOWNLOAD EBOOK

Modern microelectronic design is characterized by the integration of full systems on a single die. These systems often include large high performance digital circuitry, high resolution analog parts, high driving I/O, and maybe RF sections. Designers of such systems are constantly faced with the challenge to achieve compatibility in electrical characteristics of every section: some circuitry presents fast transients and large consumption spikes, whereas others require quiet environments to achieve resolutions well beyond millivolts. Coupling between those sections is usually unavoidable, since the entire system shares the same silicon substrate bulk and the same package. Understanding the way coupling is produced, and knowing methods to isolate coupled circuitry, and how to apply every method, is then mandatory knowledge for every IC designer. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an in-depth look at coupling through the common silicon substrate, and noise at the power supply lines. It explains the elementary knowledge needed to understand these phenomena and presents a review of previous works and new research results. The aim is to provide an understanding of the reasons for these particular ways of coupling, review and suggest solutions to noise coupling, and provide criteria to apply noise reduction. Analysis and Solutions for Switching Noise Coupling in Mixed-Signal ICs is an ideal book, both as introductory material to noise-coupling problems in mixed-signal ICs, and for more advanced designers facing this problem.


Substrate Noise Coupling in RFICs

Substrate Noise Coupling in RFICs

Author: Ahmed Helmy

Publisher: Springer Science & Business Media

Published: 2008-03-23

Total Pages: 129

ISBN-13: 1402081669

DOWNLOAD EBOOK

The book reports modeling and simulation techniques for substrate noise coupling effects in RFICs and introduces isolation structures and design guides to mitigate such effects with the ultimate goal of enhancing the yield of RF and mixed signal SoCs. The book further reports silicon measurements, and new test and noise isolation structures. To the authors’ knowledge, this is the first title devoted to the topic of substrate noise coupling in RFICs as part of a large SoC.


Substrate Noise Coupling in Analog/RF Circuits

Substrate Noise Coupling in Analog/RF Circuits

Author: Stephane Bronckers

Publisher: Artech House

Published: 2010

Total Pages: 272

ISBN-13: 1596932724

DOWNLOAD EBOOK

This book presents case studies to illustrate that careful modeling of the assembly characteristics and layout details is required to bring simulations and measurements into agreement. Engineers learn how to use a proper combination of isolation structures and circuit techniques to make analog/RF circuits more immune to substrate noise. Topics include substrate noise propagation, passive isolation structures, noise couple in active devices, measuring the coupling mechanisms in analog/RF circuits, prediction of the impact of substrate noise on analog/RF circuits, and noise coupling in analog/RF systems.


Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits

Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits

Author: Nishath K. Verghese

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 297

ISBN-13: 1461522390

DOWNLOAD EBOOK

The goal of putting `systems on a chip' has been a difficult challenge that is only recently being met. Since the world is `analog', putting systems on a chip requires putting analog interfaces on the same chip as digital processing functions. Since some processing functions are accomplished more efficiently in analog circuitry, chips with a large amount of analog and digital circuitry are being designed. Whether a small amount of analog circuitry is combined with varying amounts of digital circuitry or the other way around, the problem encountered in marrying analog and digital circuitry are the same but with different scope. Some of the most prevalent problems are chip/package capacitive and inductive coupling, ringing on the RLC tuned circuits that form the chip/package power supply rails and off-chip drivers and receivers, coupling between circuits through the chip substrate bulk, and radiated emissions from the chip/package interconnects. To aggravate the problems of designers who have to deal with the complexity of mixed-signal coupling there is a lack of verification techniques to simulate the problem. In addition to considering RLC models for the various chip/package/board level parasitics, mixed-signal circuit designers must also model coupling through the common substrate when simulating ICs to obtain an accurate estimate of coupled noise in their designs. Unfortunately, accurate simulation of substrate coupling has only recently begun to receive attention, and techniques for the same are not widely known. Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits addresses two major issues of the mixed-signal coupling problem -- how to simulate it and how to overcome it. It identifies some of the problems that will be encountered, gives examples of actual hardware experiences, offers simulation techniques, and suggests possible solutions. Readers of this book should come away with a clear directive to simulate their design for interactions prior to building the design, versus a `build it and see' mentality.


Noise Coupling in System-on-Chip

Noise Coupling in System-on-Chip

Author: Thomas Noulis

Publisher: CRC Press

Published: 2018-01-09

Total Pages: 519

ISBN-13: 1138031615

DOWNLOAD EBOOK

Noise Coupling is the root-cause of the majority of Systems on Chip (SoC) product fails. The book discusses a breakthrough substrate coupling analysis flow and modelling toolset, addressing the needs of the design community. The flow provides capability to analyze noise components, propagating through the substrate, the parasitic interconnects and the package. Using this book, the reader can analyze and avoid complex noise coupling that degrades RF and mixed signal design performance, while reducing the need for conservative design practices. With chapters written by leading international experts in the field, novel methodologies are provided to identify noise coupling in silicon. It additionally features case studies that can be found in any modern CMOS SoC product for mobile communications, automotive applications and readout front ends.


Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs

Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs

Author: Balsha R. Stanisic

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 221

ISBN-13: 1461313996

DOWNLOAD EBOOK

In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.


Parasitic Substrate Coupling in High Voltage Integrated Circuits

Parasitic Substrate Coupling in High Voltage Integrated Circuits

Author: Pietro Buccella

Publisher: Springer

Published: 2018-03-14

Total Pages: 195

ISBN-13: 3319743821

DOWNLOAD EBOOK

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific protections.