This issue of ECS Transactions covers state-of-the-art R&D results of the last 1.5 years in the field of semiconductor wafer bonding technology. Wafer Bonding Technology can be used to create novel composite materials systems and devices what would otherwise be unattainable. Wafer bonding today is rapidly expanding applications in such diverse fields as photonics, sensors, MEMS, X-ray optics, non-electronic microstructures, high performance CMOS platforms for high end servers, Si-Ge, strained SOI, Germanium-on-Insulator (GeOI), and Nanotechnologies.
This issue of ECS Transactions on Semiconductor Wafer Bonding will cover the state-of-the-art R&D results of the last 2 years in the field of semiconductor wafer bonding technology. Wafer Bonding is an Enabling Technology that can be used to create novel composite materials systems and devices that would otherwise be unattainable. Wafer Bonding today is rapidly expanding into new applications in such diverse fields as photonics, sensors, MEMS. X-ray optics, non-electronic microstructures, high performance CMOS platforms for high end servers, Si-Ge, strained SOI, Germanium-on-Insulator (GeOI) and Nanotechnologies.
During the past decade direct wafer bonding has developed into a mature materials integration technology. This book presents state-of-the-art reviews of the most important applications of wafer bonding written by experts from industry and academia. The topics include bonding-based fabrication methods of silicon-on-insulator, photonic crystals, VCSELs, SiGe-based FETs, MEMS together with hybrid integration and laser lift-off. The non-specialist will learn about the basics of wafer bonding and its various application areas, while the researcher in the field will find up-to-date information about this fast-moving area, including relevant patent information.
Semiconductor wafer bonding continues to evolve as a crucial technology extending new integration schemes and disseminating new product architectures in such diverse areas as high quality silicon-on-insulator (SOI) materials for electronic applications, Si-Ge strained layers, Germanium-on-Insulator (GeOI), 3D device integration, Si on quartz or glass for thin film displays, compound semiconductor-on-Si heterostructures and Micro-Electro-Mechanical Systems.
Provides an In-depth discussion of surface conditioning for semiconductor applications The Handbook of Cleaning for Semiconductor Manufacturing: Fundamentals and Applications provides an in-depth discussion of surface conditioning for semiconductor applications. The fundamental physics and chemistry associated with wet processing is reviewed as well as surface and colloidal aspects of cleaning and etching. Topics covered in this new reference include: Front end line (FEOL) and back end of line (BEOL) cleaning applications such as high-k/metal gate post-etch cleaning and pore sealing, high-dose implant stripping and cleaning, and germanium, and silicon passivation Formulation development practices, methodology and a new directions are presented including chemicals used for preventing corrosion of copper lines, cleaning aluminium lines, reclaiming wafers, and water bonding, as well as the filtering and recirculating of chemicals including reuse and recycling Wetting, cleaning, and drying of features, such as high aspect ratio features and hydrophilic surface states, especially how to dry without watermarks, the abilities to wet hydrophobic surfaces and to remove liquid from deep features The chemical reactions and mechanisms of silicon dioxide etching with hydrofluoric acid, particle removal with ammonium hydroxide/hydrogen peroxide mixture, and metal removal with hydrochloric acid The Handbook of Cleaning for Semiconductor Manufacturing: Fundamentals and Applications is a valuable resource for any engineer or manager associated with using or supplying cleaning and contamination free technologies for semiconductor manufacturing. Engineers working for semiconductor manufacturing, capital equipment, chemicals, or other industries that assures cleanliness of chemicals, material, and equipment in the manufacturing area will also find this handbook an indispensible reference.
The first encompassing treatise of this new, but very important field puts the known physical limitations for classic 2D electronics into perspective with the requirements for further electronics developments and market necessities. This two-volume handbook presents 3D solutions to the feature density problem, addressing all important issues, such as wafer processing, die bonding, packaging technology, and thermal aspects. It begins with an introductory part, which defines necessary goals, existing issues and relates 3D integration to the semiconductor roadmap of the industry. Before going on to cover processing technology and 3D structure fabrication strategies in detail. This is followed by fields of application and a look at the future of 3D integration. The contributions come from key players in the field, from both academia and industry, including such companies as Lincoln Labs, Fraunhofer, RPI, ASET, IMEC, CEA-LETI, IBM, and Renesas.
