Proceedings of the 8th International Workshop on Interconnection Network Architecture
Proceedings of the 8th International Workshop on Interconnection Network Architecture

Author: Giorgos Dimitrakopoulos

Publisher:

Published: 2014-01-22

Total Pages: 23

ISBN-13: 9781450326391

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8th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC) 2014 Jan 22, 2014-Jan 22, 2014 Vienna, Austria. You can view more information about this proceeding and all of ACM�s other published conference proceedings from the ACM Digital Library: http://www.acm.org/dl.

On-Chip Networks
On-Chip Networks

Author: Natalie Enright

Publisher: Springer Nature

Published: 2009-07-16

Total Pages: 137

ISBN-13: 3031017250

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With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions