Parallel Algorithms and Architectures for DSP Applications
Parallel Algorithms and Architectures for DSP Applications

Author: Magdy A. Bayoumi

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 289

ISBN-13: 146153996X

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Over the past few years, the demand for high speed Digital Signal Proces sing (DSP) has increased dramatically. New applications in real-time image processing, satellite communications, radar signal processing, pattern recogni tion, and real-time signal detection and estimation require major improvements at several levels; algorithmic, architectural, and implementation. These perfor mance requirements can be achieved by employing parallel processing at all levels. Very Large Scale Integration (VLSI) technology supports and provides a good avenue for parallelism. Parallelism offers efficient sohitions to several problems which can arise in VLSI DSP architectures such as: 1. Intermediate data communication and routing: several DSP algorithms, such as FFT, involve excessive data routing and reordering. Parallelism is an efficient mechanism to minimize the silicon cost and speed up the pro cessing time of the intermediate middle stages. 2. Complex DSP applications: the required computation is almost doubled. Parallelism will allow two similar channels processing at the same time. The communication between the two channels has to be minimized. 3. Applicatilm specific systems: this emerging approach should achieve real-time performance in a cost-effective way. 4. Testability and fault tolerance: reliability has become a required feature in most of DSP systems. To achieve such property, the involved time overhead is significant. Parallelism may be the solution to maintain ac ceptable speed performance.

Digital Signal Processing
Digital Signal Processing

Author: Winser Alexander

Publisher: Academic Press

Published: 2016-11-14

Total Pages: 636

ISBN-13: 0080885268

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Digital signal processing (DSP) has been applied to a very wide range of applications. This includes voice processing, image processing, digital communications, the transfer of data over the internet, image and data compression, etc. Engineers who develop DSP applications today, and in the future, will need to address many implementation issues including mapping algorithms to computational structures, computational efficiency, power dissipation, the effects of finite precision arithmetic, throughput and hardware implementation. It is not practical to cover all of these in a single text. However, this text emphasizes the practical implementation of DSP algorithms as well as the fundamental theories and analytical procedures that form the basis for modern DSP applications. Digital Signal Processing: Principles, Algorithms and System Design provides an introduction to the principals of digital signal processing along with a balanced analytical and practical treatment of algorithms and applications for digital signal processing. It is intended to serve as a suitable text for a one semester junior or senior level undergraduate course. It is also intended for use in a following one semester first-year graduate level course in digital signal processing. It may also be used as a reference by professionals involved in the design of embedded computer systems, application specific integrated circuits or special purpose computer systems for digital signal processing, multimedia, communications, or image processing. - Covers fundamental theories and analytical procedures that form the basis of modern DSP - Shows practical implementation of DSP in software and hardware - Includes Matlab for design and implementation of signal processing algorithms and related discrete time systems - Bridges the gap between reference texts and the knowledge needed to implement DSP applications in software or hardware

ARCHITECTURES FOR DIGITAL SIGNAL PROCESSING
ARCHITECTURES FOR DIGITAL SIGNAL PROCESSING

Author: Peter Pirsch

Publisher: John Wiley & Sons

Published: 2009-08

Total Pages: 0

ISBN-13:

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About The Book: This book fuses signal processing algorithms and VLSI circuit design to assist digital signal processing architecture developers. The author then shows how this technique can be used in applications such as: signal transmission and storage, manufacturing process quality control and assurance, autonomous mobile system control and biomedical process analysis. This new publication is a revised and expanded version.

Algorithms and Architectures for Parallel Processing
Algorithms and Architectures for Parallel Processing

Author: Sang-Soo Yeo

Publisher: Springer Science & Business Media

Published: 2010-05-10

Total Pages: 490

ISBN-13: 3642131352

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This book constitutes the symposia and workshops of the 10th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP. Each of the sympois and workshops focuses on a particular theme and complements the spectrum of the main conference.

Field-Programmable Gate Arrays
Field-Programmable Gate Arrays

Author: Stephen D. Brown

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 218

ISBN-13: 1461535727

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Field-Programmable Gate Arrays (FPGAs) have emerged as an attractive means of implementing logic circuits, providing instant manufacturing turnaround and negligible prototype costs. They hold the promise of replacing much of the VLSI market now held by mask-programmed gate arrays. FPGAs offer an affordable solution for customized VLSI, over a wide variety of applications, and have also opened up new possibilities in designing reconfigurable digital systems. Field-Programmable Gate Arrays discusses the most important aspects of FPGAs in a textbook manner. It provides the reader with a focused view of the key issues, using a consistent notation and style of presentation. It provides detailed descriptions of commercially available FPGAs and an in-depth treatment of the FPGA architecture and CAD issues that are the subjects of current research. The material presented is of interest to a variety of readers, including those who are not familiar with FPGA technology, but wish to be introduced to it, as well as those who already have an understanding of FPGAs, but who are interested in learning about the research directions that are of current interest.

High Level Synthesis of ASICs under Timing and Synchronization Constraints
High Level Synthesis of ASICs under Timing and Synchronization Constraints

Author: David C. Ku

Publisher: Springer Science & Business Media

Published: 2013-03-14

Total Pages: 302

ISBN-13: 147572117X

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Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in synthesis of general-purpose and signal processors, where data-path design is of utmost importance. In contrast, ASIC designs are often characterized by complex control schemes, to support communication and synchronization with the environment. The combined design of efficient data-path control-unit is the major contribution of this book. Three requirements are important in modeling ASIC designs: concurrency, external synchronization, and detailed timing constraints. The objective of the research work presented here is to develop a hardware model incorporating these requirements as well as synthesis algorithms that operate on this hardware model. The contributions of this book address both the theory and the implementation of algorithm for hardware synthesis.

Acoustical and Environmental Robustness in Automatic Speech Recognition
Acoustical and Environmental Robustness in Automatic Speech Recognition

Author: A. Acero

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 197

ISBN-13: 1461531225

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The need for automatic speech recognition systems to be robust with respect to changes in their acoustical environment has become more widely appreciated in recent years, as more systems are finding their way into practical applications. Although the issue of environmental robustness has received only a small fraction of the attention devoted to speaker independence, even speech recognition systems that are designed to be speaker independent frequently perform very poorly when they are tested using a different type of microphone or acoustical environment from the one with which they were trained. The use of microphones other than a "close talking" headset also tends to severely degrade speech recognition -performance. Even in relatively quiet office environments, speech is degraded by additive noise from fans, slamming doors, and other conversations, as well as by the effects of unknown linear filtering arising reverberation from surface reflections in a room, or spectral shaping by microphones or the vocal tracts of individual speakers. Speech-recognition systems designed for long-distance telephone lines, or applications deployed in more adverse acoustical environments such as motor vehicles, factory floors, oroutdoors demand far greaterdegrees ofenvironmental robustness. There are several different ways of building acoustical robustness into speech recognition systems. Arrays of microphones can be used to develop a directionally-sensitive system that resists intelference from competing talkers and other noise sources that are spatially separated from the source of the desired speech signal.

Algorithms And Architectures For Parallel Processing - Proceedings Of The 1997 3rd International Conference
Algorithms And Architectures For Parallel Processing - Proceedings Of The 1997 3rd International Conference

Author: Andrzej Marian Goscinski

Publisher: World Scientific

Published: 1997-11-15

Total Pages: 792

ISBN-13: 9814545341

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The IEEE Third International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP-97) will be held in Melbourne, Australia from December 8th to 12th, 1997. The purpose of this important conference is to bring together developers and researchers from universities, industry and government to advance science and technology in distributed and parallel systems and processing.

Low Power Design Methodologies
Low Power Design Methodologies

Author: Jan M. Rabaey

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 373

ISBN-13: 1461523079

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Low Power Design Methodologies presents the first in-depth coverage of all the layers of the design hierarchy, ranging from the technology, circuit, logic and architectural levels, up to the system layer. The book gives insight into the mechanisms of power dissipation in digital circuits and presents state of the art approaches to power reduction. Finally, it introduces a global view of low power design methodologies and how these are being captured in the latest design automation environments. The individual chapters are written by the leading researchers in the area, drawn from both industry and academia. Extensive references are included at the end of each chapter. Audience: A broad introduction for anyone interested in low power design. Can also be used as a text book for an advanced graduate class. A starting point for any aspiring researcher.