Masters Theses in the Pure and Applied Sciences
Masters Theses in the Pure and Applied Sciences

Author: W. H. Shafer

Publisher: Springer Science & Business Media

Published: 2013-03-14

Total Pages: 307

ISBN-13: 1475757859

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Masters Theses in the Pure and Applied Sciences was first conceived, published, and dis seminated by the Center for Information and Numerical Data Analysis and Synthesis (CINDAS) * at Purdue University in 1957, starting its coverage of theses with the academic year 1955. Beginning with Volume 13, the printing and dissemination phases of the ac tivity were transferred to University Microfilms/Xerox of Ann Arbor, Michigan, with the thought that such an arrangement would be more beneficial to the academic and general scientific and technical community. After five years of this joint undertaking we had concluded that it was in the interest of all concerned if the printing and distribution of the volume were handled by an international publishing house to assure improved service and broader dissemination. Hence, starting with Volume 18, Masters Theses in the Pure and Applied Sciences has been disseminated on a worldwide basis by Plenum Publishing Corporation of New York, and in the same year the coverage was broadened to include Canadian universities. All back issues can also be ordered from Plenum. We have reported in Volume 24 (thesis year 1979) a total of 10,033 theses titles from 26 Canadian and 215 United States universities. We are sure that this broader base for theses titles reported will greatly enhance the value of this important annual reference work. While Volume 24 reports these submitted in 1979, on occasion, certain universities do report theses submitted in previous years but not reported at the time.

Digital Circuit Testing and Testability
Digital Circuit Testing and Testability

Author: Parag K. Lala

Publisher: Academic Press

Published: 1997

Total Pages: 222

ISBN-13: 9780124343306

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An easy to use introduction to the practices and techniques in the field of digital circuit testing. Lala writes in a user-friendly and tutorial style, making the book easy to read, even for the newcomer to fault-tolerant system design. Each informative chapter is self-contained, with little or no previous knowledge of a topic assumed. Extensive references follow each chapter.

Random Testing of Digital Circuits
Random Testing of Digital Circuits

Author: Rene David

Publisher: CRC Press

Published: 2020-11-26

Total Pages: 508

ISBN-13: 1000146014

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"Introduces a theory of random testing in digital circuits for the first time and offers practical guidance for the implementation of random pattern generators, signature analyzers design for random testability, and testing results. Contains several new and unpublished results. "

Digital Circuit Testing
Digital Circuit Testing

Author: Francis C. Wong

Publisher: Elsevier

Published: 2012-12-02

Total Pages: 248

ISBN-13: 0080504345

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Recent technological advances have created a testing crisis in the electronics industry--smaller, more highly integrated electronic circuits and new packaging techniques make it increasingly difficult to physically access test nodes. New testing methods are needed for the next generation of electronic equipment and a great deal of emphasis is being placed on the development of these methods. Some of the techniques now becoming popular include design for testability (DFT), built-in self-test (BIST), and automatic test vector generation (ATVG). This book will provide a practical introduction to these and other testing techniques. For each technique introduced, the author provides real-world examples so the reader can achieve a working knowledge of how to choose and apply these increasingly important testing methods.

An Introduction to Logic Circuit Testing
An Introduction to Logic Circuit Testing

Author: Parag K. Lala

Publisher: Morgan & Claypool Publishers

Published: 2009

Total Pages: 111

ISBN-13: 1598293508

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An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips. Table of Contents: Introduction / Fault Detection in Logic Circuits / Design for Testability / Built-in Self-Test / References

Logic Testing and Design for Testability
Logic Testing and Design for Testability

Author: Hideo Fujiwara

Publisher: MIT Press

Published: 1985

Total Pages: 314

ISBN-13:

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Design for testability techniques offer one approach toward alleviating this situation by adding enough extra circuitry to a circuit or chip to reduce the complexity of testing.

Testing of Digital Systems
Testing of Digital Systems

Author: N. K. Jha

Publisher: Cambridge University Press

Published: 2003-05-08

Total Pages: 1022

ISBN-13: 9781139437431

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Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.

Digital Systems Testing and Testable Design
Digital Systems Testing and Testable Design

Author: Miron Abramovici

Publisher: Wiley-IEEE Press

Published: 1994-09-27

Total Pages: 672

ISBN-13: 9780780310629

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This updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.

Testability Concepts for Digital ICs
Testability Concepts for Digital ICs

Author: F.P.M. Beenker

Publisher: Springer Science & Business Media

Published: 2012-12-06

Total Pages: 216

ISBN-13: 1461523656

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Preface Testing Integrated Circuits for manufacturing defects includes four basic disciplines. First of all an understanding of the origin and behaviour of defects. Secondly, knowledge of IC design and IC design styles. Thirdly, knowledge of how to create a test program for an IC which is targeted on detecting these defects, and finally, understanding of the hardware, Automatic Test Equipment, to run the test on. All four items have to be treated, managed, and to a great extent integrated before the term 'IC quality' gets a certain meaning and a test a certain measurable value. The contents of this book reflects our activities on testability concepts for complex digital ICs as performed at Philips Research Laboratories in Eindhoven, The Netherlands. Based on the statements above, we have worked along a long term plan, which was based on four pillars. 1. The definition of a test methodology suitable for 'future' IC design styles, 2. capable of handling improved defect models, 3. supported by software tools, and 4. providing an easy link to Automatic Test Equipment. The reasoning we have followed was continuously focused on IC qUality. Quality expressed in terms of the ability of delivering a customer a device with no residual manufacturing defects. Bad devices should not escape a test. The basis of IC quality is a thorough understanding of defects and defect models.