Nanometer Frequency Synthesis Beyond the Phase-Locked Loop

Nanometer Frequency Synthesis Beyond the Phase-Locked Loop

Author: Liming Xiu

Publisher: John Wiley & Sons

Published: 2012-08-14

Total Pages: 339

ISBN-13: 1118162633

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Introducing a new, pioneering approach to integrated circuit design Nanometer Frequency Synthesis Beyond Phase-Locked Loop introduces an innovative new way of looking at frequency that promises to open new frontiers in modern integrated circuit (IC) design. While most books on frequency synthesis deal with the phase-locked loop (PLL), this book focuses on the clock signal. It revisits the concept of frequency, solves longstanding problems in on-chip clock generation, and presents a new time-based information processing approach for future chip design. Beginning with the basics, the book explains how clock signal is used in electronic applications and outlines the shortcomings of conventional frequency synthesis techniques for dealing with clock generation problems. It introduces the breakthrough concept of Time-Average-Frequency, presents the Flying-Adder circuit architecture for the implementation of this approach, and reveals a new circuit device, the Digital-to-Frequency Converter (DFC). Lastly, it builds upon these three key components to explain the use of time rather than level to represent information in signal processing. Provocative, inspiring, and chock-full of ideas for future innovations, the book features: A new way of thinking about the fundamental concept of clock frequency A new circuit architecture for frequency synthesis: the Flying-Adder direct period synthesis A new electronic component: the Digital-to-Frequency Converter A new information processing approach: time-based vs. level-based Examples demonstrating the power of this technology to build better, cheaper, and faster systems Written with the intent of showing readers how to think outside the box, Nanometer Frequency Synthesis Beyond the Phase-Locked Loop is a must-have resource for IC design engineers and researchers as well as anyone who would like to be at the forefront of modern circuit design.


Nanometer Frequency Synthesis Beyond the Phase-Locked Loop

Nanometer Frequency Synthesis Beyond the Phase-Locked Loop

Author: Liming Xiu

Publisher: John Wiley & Sons

Published: 2012-06-22

Total Pages: 339

ISBN-13: 1118347943

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Introducing a new, pioneering approach to integrated circuit design Nanometer Frequency Synthesis Beyond Phase-Locked Loop introduces an innovative new way of looking at frequency that promises to open new frontiers in modern integrated circuit (IC) design. While most books on frequency synthesis deal with the phase-locked loop (PLL), this book focuses on the clock signal. It revisits the concept of frequency, solves longstanding problems in on-chip clock generation, and presents a new time-based information processing approach for future chip design. Beginning with the basics, the book explains how clock signal is used in electronic applications and outlines the shortcomings of conventional frequency synthesis techniques for dealing with clock generation problems. It introduces the breakthrough concept of Time-Average-Frequency, presents the Flying-Adder circuit architecture for the implementation of this approach, and reveals a new circuit device, the Digital-to-Frequency Converter (DFC). Lastly, it builds upon these three key components to explain the use of time rather than level to represent information in signal processing. Provocative, inspiring, and chock-full of ideas for future innovations, the book features: A new way of thinking about the fundamental concept of clock frequency A new circuit architecture for frequency synthesis: the Flying-Adder direct period synthesis A new electronic component: the Digital-to-Frequency Converter A new information processing approach: time-based vs. level-based Examples demonstrating the power of this technology to build better, cheaper, and faster systems Written with the intent of showing readers how to think outside the box, Nanometer Frequency Synthesis Beyond the Phase-Locked Loop is a must-have resource for IC design engineers and researchers as well as anyone who would like to be at the forefront of modern circuit design.


Advanced Frequency Synthesis by Phase Lock

Advanced Frequency Synthesis by Phase Lock

Author: William F. Egan

Publisher: John Wiley & Sons

Published: 2011-10-07

Total Pages: 312

ISBN-13: 1118171152

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The latest frequency synthesis techniques, including sigma-delta,Diophantine, and all-digital Sigma-delta is a frequency synthesis technique that has risen inpopularity over the past decade due to its intensely digital natureand its ability to promote miniaturization. A continuation of thepopular Frequency Synthesis by Phase Lock, Second Edition, thistimely resource provides a broad introduction to sigma-delta bypairing practical simulation results with cutting-edge research.Advanced Frequency Synthesis by Phase Lock discusses bothsigma-delta and fractional-n—the still-in-use forerunner tosigma-delta—employing Simulink® models and detailedsimulations of results to promote a deeper understanding. After a brief introduction, the book shows how spurs areproduced at the synthesizer output by the basic process anddifferent methods for overcoming them. It investigates how variousdefects in sigma-delta synthesis contribute to spurs or noise inthe synthesized signal. Synthesizer configurations are analyzed,and it is revealed how to trade off the various noise sources bychoosing loop parameters. Other sigma-delta synthesis architecturesare then reviewed. The Simulink simulation models that provided data for thepreceding discussions are described, providing guidance in makinguse of such models for further exploration. Next, another methodfor achieving wide loop bandwidth simultaneously with fineresolution—the Diophantine Frequency Synthesizer—isintroduced. Operation at extreme bandwidths is also covered,further describing the analysis of synthesizers that push theirbandwidths close to the sampling-frequency limit. Lastly, the bookreviews a newly important technology that is poised to becomewidely used in high-production consumerelectronics—all-digital frequency synthesis. Detailed appendices provide in-depth discussion on variousstages of development, and many related resources are available fordownload, including Simulink models, MATLAB® scripts,spreadsheets, and executable programs. All these features make thisauthoritative reference ideal for electrical engineers who want toachieve an understanding of sigma-delta frequency synthesis and anawareness of the latest developments in the field.


Digital Frequency Synthesis Demystified

Digital Frequency Synthesis Demystified

Author: Bar-Giora Goldberg

Publisher: Elsevier

Published: 2000-02-20

Total Pages: 354

ISBN-13: 0080504299

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· In-depth coverage of modern digital implementations of frequency synthesis architectures· Numerous design examples drawn from actual engineering projectsDigital frequency synthesis is used in modern wireless and communications technologies such as radar, cellular telephony, satellite communications, electronic imaging, and spectroscopy. This is book is a comprehensive overview of digital frequency synthesis theory and applications, with a particular emphasis on the latest approaches using fractional-N phase-locked loop technology. In-depth coverage of modern digital implementations of frequency synthesis architectures Numerous design examples drawn from actual engineering projects


The Turn of Moore’s Law from Space to Time

The Turn of Moore’s Law from Space to Time

Author: Liming Xiu

Publisher: Springer Nature

Published: 2022-05-24

Total Pages: 339

ISBN-13: 9811690650

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This book states that a space-induced crisis is recognized as the cause of trouble that Moore’s Law is currently facing. The contemporary practice of this empirical law can be considered as happening within a space-dominant paradigm. An alternative of exploiting potential in the dimension of time is identified as an emerging paradigm in microelectronics. The new practice is termed a time-oriented paradigm. It is justified as the turn of Moore’s Law from space to time. The resultant Time-Moore strategy is envisioned as the next-generation enabler for continuing Moore’s Law’s pursuit of everhigher information processing power and efficiency. It also serves as the perpetuation of the spirit that Moore’s law is nothing but a collective storied history of innovations. In the first part of this book, by following Thomas Kuhn’s seminal work around the concepts of paradigm and scientific revolution, the argument for the Time-Moore strategy (Time-Moore: to use time more) and the paradigm shift from space to time is carried out heavily through philosophical persuasion rather than technical proof due to the difficult challenge of change-of-mindset. The second part of the book provides solid technical materials for supporting this transition from the old paradigm to the new one. In short, the goal of this book is to reevaluate the contemporary practice of microelectronics, identify the cause of the current crisis, advocate a change-of-mindset to circumvent the crisis, and ultimately point out a new route for advancing. After achieving so many unprecedented accomplishments through several decades of relentless endeavor, it’s time for the big ship of Moore’s Law (i.e., the art of microelectronic system design) to make a turn.


Phase Lock Loops and Frequency Synthesis

Phase Lock Loops and Frequency Synthesis

Author: Venceslav F. Kroupa

Publisher: John Wiley & Sons

Published: 2003-09-12

Total Pages: 334

ISBN-13: 0470865121

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Phase lock loop frequency synthesis finds uses in a myriad of wireless applications - from local oscillators for receivers and transmitters to high performance RF test equipment. As the security and reliability of mobile communication transmissions have gained importance, PLL and frequency synthesisers have become increasingly topical subjects. Phase Lock Loops and Frequency Synthesis examines the various components that make up the phase lock loop design, including oscillators (crystal, voltage controlled), dividers and phase detectors. Interaction amongst the various components are also discussed. Real world problems such as power supply noise, shielding, grounding and isolation are given comprehensive coverage and solved examples with MATHCAD programs are presented throughout. Presents a comprehesive study of phase lock loops and frequency synthesis in communication systems Written by an internationally-recognised expert in the field Details the problem of spurious signals in PLL frequency synthesizers, a topic neglected by available competing titles Provides detailed theorectical background coupled with practical examples of state-of-the-art device design MATHCAD programs and simulation software to accompany the design exercises and examples This combination of thorough theoretical treatment and guidance on practical applications will appeal to mobile communication circuit designers and advanced electrical engineering students.


Design of Fractional-N Phase Locked Loops for Frequency Synthesis from 30 to 40 GHz

Design of Fractional-N Phase Locked Loops for Frequency Synthesis from 30 to 40 GHz

Author: George Gal

Publisher:

Published: 2013

Total Pages:

ISBN-13:

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"High-frequency fractional-N PLLs in CMOS technology in the 30 to 40 GHz are very dicult to design when considering power, area, phase noise requirements and frequency range of operation. One of the diculties is to synthesize the loop lter of the PLL such that it meets the phase noise characteristics using the information available for all the components that make up the PLL. At the same time, predicting the phase noise output of the PLL using extracted layout results takes a long time to simulate and often the solution does not converge, thereby lengthening the design cycle. This thesis proposes a new methodology for designing high performance wide-band fractional-N PLLs in the 30-40 GHz range. The method begins by rst designing the phase-frequency detector/charge-pump, voltage-controlled oscillator and frequency divider circuit for realization in a specic CMOS technology. The method of choice mixes insight deemed from both a theoretical and simulation perspective. Next, the loop lter is derived based on the layout extracted behaviour of each component. Once complete, all components of the PLL are described using the high-level description language of Verilog-A available in the Cadence tool set over its full range of operating characteristics. Ideally, these components would be fabricated rst and characterized afterward. The Verilog-A description of the PLL enables a fast and ecient simulation of the complete PLL in a closed-loop conguration. This latter steps allows further optimization of the overall design. Two chips have been fabricated; one in a 0.13 m CMOS process from IBM and another in a 65 nm CMOS process from TSMC. One chip contain the design of a 28 GHz VCO and another containing the design of a programmable frequency divider circuit. Experimental results for both chip are provided." --