Author: Thuy Thanh Nguyen

Publisher:

Published: 2017

Total Pages:

ISBN-13: 9780355763133

The progress in wireless technology has given rise to a need for highly linear and broadband Microwave Monolithic Integrated Circuits (MMICs) that can cover as many wireless standards and frequency bands as possible in both military and commercial applications. The major contributions of this PhD research work include the development and design of several broadband, high performance MMICs suitable for multiple standards, especially on broadband, highly linear mixers. The developed circuits are listed out as the following: · Designed two mixer prototypes: a single-balanced mixer and a double-balanced mixer that combines the optimum drain bias condition and multiple gated transistors for resistive mixers. The experimental results demonstrate that the single-balanced prototype mixer has a measured conversion loss of less than 11 dB and third-order input intercept point (IIP3) range of 27 - 33 dBm at 15 dBm LO drive from 7 to 34 GHz. The double-balanced mixer exhibits a conversion loss of less than 11 dB and IIP3 range of 31 - 35 dBm from 7 - 26 GHz at 17 dBm LO drive. Both prototypes achieve a high port-to-port isolation of over 30 dB within the operation bandwidth. ·Designed highly linear gate-pumped distributed downconverter mixers in a 0.25 [mu]m, Enhancement-mode (E-mode) GaAs pHEMT process. The mixers achieve a measured 3rd order input intercept point (IIP3) above 30 dBm in the RF frequency ranges of 6 - 26 GHz and 6-20 GHz, respectively. Both mixers show a conversion loss of less than 10 dB. The balanced mixer exhibits more than 30 dB of LO-RF isolation. · Designed a dual-mode, recongurable, fully integrated double-balanced ring mixer. The conversion gain can change from -6 dB to 6 dB over RF frequency range of 7 - 42 GHz. The measured input third order intercept point (IIP3) is 5 dBm and the measured input 1-dB compression point (IP1dB) is 5 dBm at the highest conversion gain mode with 4-dBm LO drive. At the lowest conversion gain mode, the IIP3 is 20 dBm and IP1dB is 12 dBm with 13-dBm LO drive. · Designed a fully-integrated, push-pull, high power distributed amplier for wideband applications in 0:25 μm GaAs pHEMT process. The amplier exhibits 7 - 10 dB gain, 30 - 32 dBm output power at 1-dB compression (P1dB) and 32 - 35.4dBm saturated output power (Psat) covering a frequency bandwidth from 4 - 20 GHz. The measured second harmonic suppression is more than 33 dBc from 8 to 40 GHz at the P1dB operating condition. · Designed a 6 - 46 GHz balanced distributed doubler fabricated in a low-cost 0.25 μm GaAs pHEMT process The proposed frequency doubler achieves a measured gain of 8 - 14 dB, a maximum output power of 12 - 19dBm and a typical fundamental suppression of 15 dBc from 6 - 46 GHz.