This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process. It covers all CAD/CAE aspects of a SOC design flow and addresses a new topic (DFM/DFY) critical at 90 nm and beyond. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Cutting-Edge CMOS VLSI Design for Manufacturability Techniques This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource. Nanoscale CMOS VLSI Circuits covers: Current trends in CMOS VLSI design Semiconductor manufacturing technologies Photolithography Process and device variability: analyses and modeling Manufacturing-Aware Physical Design Closure Metrology, manufacturing defects, and defect extraction Defect impact modeling and yield improvement techniques Physical design and reliability DFM tools and methodologies
Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology, and adequate use of the knowledge database. Starting with the basics, Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design introduces the essential fundamental concepts for designing analog circuits with optimal performances. This book explains the links between the physics and technology of scaled MOS transistors and the design and simulation of nano-scale analog circuits. It also explores the development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits. The book outlines the general trends of technology scaling with respect to device geometry, process parameters, and supply voltage. It describes models and optimization techniques, as well as the compact modeling of scaled MOS transistors for VLSI circuit simulation. • Includes two learning-based methods: the artificial neural network (ANN) and the least-squares support vector machine (LS-SVM) method • Provides case studies demonstrating the practical use of these two methods • Explores circuit sizing and specification translation tasks • Introduces the particle swarm optimization technique and provides examples of sizing analog circuits • Discusses the advanced effects of scaled MOS transistors like narrow width effects, and vertical and lateral channel engineering Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design describes the models and CAD techniques, explores the physics of MOS transistors, and considers the design challenges involving statistical variations of process technology parameters and reliability constraints related to circuit design.
This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements. Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters; Includes built-in testing techniques, linked to current industrial trends; Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches; Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.
Nowadays over 50% of integrated circuits are fabricated at wafer foundries. This book presents a foundry-integrated perspective of the field and is a comprehensive and up-to-date manual designed to serve process, device, layout, and design engineers. It comprises chapters carefully selected to cover topics relevant for them to deal with their work. The book provides an insight into the different types of design rules (DRs) and considerations for setting new DRs. It discusses isolation, gate patterning, S/D contacts, metal lines, MOL, air gaps, and so on. It explains in detail the layout rules needed to support advanced planarization processes, different types of dummies, and related utilities as well as presents a large set of guidelines and layout-aware modeling for RF CMOS and analog modules. It also discusses the layout DRs for different mobility enhancement techniques and their related modeling, listing many of the dedicated rules for static random-access memory (SRAM), embedded polyfuse (ePF), and LogicNVM. The book also provides the setting and calibration of the process parameters set and describes the 28~20 nm planar MOSFET process flow for low-power and high-performance mobile applications in a step-by-step manner. It includes FEOL and BEOL physical and environmental tests for qualifications together with automotive qualification and design for automotive (DfA). Written for the professionals, the book belongs to the bookshelf of microelectronic discipline experts.
This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level “design hints” are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.
This book explains the application of recent advances in computational intelligence – algorithms, design methodologies, and synthesis techniques – to the design of integrated circuits and systems. It highlights new biasing and sizing approaches and optimization techniques and their application to the design of high-performance digital, VLSI, radio-frequency, and mixed-signal circuits and systems. This first of two related volumes addresses the design of analog and mixed-signal (AMS) and radio-frequency (RF) circuits, with 17 chapters grouped into parts on analog and mixed-signal applications, and radio-frequency design. It will be of interest to practitioners and researchers in computer science and electronics engineering engaged with the design of electronic circuits.
This accessible text is now fully revised and updated, providing an overview of fabrication technologies and materials needed to realize modern microdevices. It demonstrates how common microfabrication principles can be applied in different applications, to create devices ranging from nanometer probe tips to meter scale solar cells, and a host of microelectronic, mechanical, optical and fluidic devices in between. Latest developments in wafer engineering, patterning, thin films, surface preparation and bonding are covered. This second edition includes: expanded sections on MEMS and microfluidics related fabrication issues new chapters on polymer and glass microprocessing, as well as serial processing techniques 200 completely new and 200 modified figures more coverage of imprinting techniques, process integration and economics of microfabrication 300 homework exercises including conceptual thinking assignments, order of magnitude estimates, standard calculations, and device design and process analysis problems solutions to homework problems on the complementary website, as well as PDF slides of the figures and tables within the book With clear sections separating basic principles from more advanced material, this is a valuable textbook for senior undergraduate and beginning graduate students wanting to understand the fundamentals of microfabrication. The book also serves as a handy desk reference for practicing electrical engineers, materials scientists, chemists and physicists alike. www.wiley.com/go/Franssila_Micro2e
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
